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Searched refs:dst_bo (Results 1 – 25 of 31) sorted by relevance

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/external/igt-gpu-tools/benchmarks/
Dintel_upload_blit_large.c76 drm_intel_bo *dst_bo, int width, int height) in do_render() argument
101 OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in do_render()
117 drm_intel_bo *dst_bo; in main() local
129 dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); in main()
133 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
135 drm_intel_bo_wait_rendering(dst_bo); in main()
140 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
142 drm_intel_bo_wait_rendering(dst_bo); in main()
Dintel_upload_blit_large_gtt.c73 drm_intel_bo *dst_bo, int width, int height) in do_render() argument
98 OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in do_render()
114 drm_intel_bo *dst_bo; in main() local
126 dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); in main()
130 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
132 drm_intel_bo_wait_rendering(dst_bo); in main()
137 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
139 drm_intel_bo_wait_rendering(dst_bo); in main()
Dintel_upload_blit_large_map.c76 drm_intel_bo *dst_bo, int width, int height) in do_render() argument
101 OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in do_render()
117 drm_intel_bo *dst_bo; in main() local
129 dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); in main()
133 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
135 drm_intel_bo_wait_rendering(dst_bo); in main()
140 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
142 drm_intel_bo_wait_rendering(dst_bo); in main()
Dintel_upload_blit_small.c70 drm_intel_bo *dst_bo, int width, int height) in do_render() argument
111 OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in do_render()
127 drm_intel_bo *dst_bo; in main() local
139 dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); in main()
143 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
145 drm_intel_bo_wait_rendering(dst_bo); in main()
150 do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); in main()
152 drm_intel_bo_wait_rendering(dst_bo); in main()
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_blit.c218 struct radeon_bo *dst_bo) in validate_buffers() argument
230 dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT); in validate_buffers()
333 struct radeon_bo *dst_bo, in r100_blit() argument
367 if (src_bo == dst_bo) { in r100_blit()
384 _mesa_get_format_name(dst_mesaformat), dst_bo); in r100_blit()
393 if (!validate_buffers(r100, src_bo, dst_bo)) in r100_blit()
401 emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height); in r100_blit()
Dradeon_blit.h44 struct radeon_bo *dst_bo,
Dradeon_common_context.h451 struct radeon_bo *dst_bo,
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_blit.c369 struct radeon_bo *dst_bo) argument
381 dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
481 struct radeon_bo *dst_bo, argument
515 if (src_bo == dst_bo) {
532 _mesa_get_format_name(dst_mesaformat), dst_bo);
541 if (!validate_buffers(r200, src_bo, dst_bo))
549 emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
Dr200_blit.h44 struct radeon_bo *dst_bo,
Dradeon_common_context.h451 struct radeon_bo *dst_bo,
/external/igt-gpu-tools/lib/
Dintel_batchbuffer.c399 drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch, in intel_blt_copy() argument
410 igt_assert(dst_pitch * (dst_y1 + height) <= dst_bo->size); in intel_blt_copy()
413 drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle); in intel_blt_copy()
454 OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in intel_blt_copy()
468 if (gen >= 6 && src_bo == dst_bo) { in intel_blt_copy()
492 drm_intel_bo *dst_bo, drm_intel_bo *src_bo, in intel_copy_bo() argument
499 dst_bo, 0, 0, 4096, in intel_copy_bo()
Dintel_batchbuffer.h195 drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
198 drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
/external/mesa3d/src/amd/vulkan/
Dradv_meta_buffer.c322 struct radeon_winsys_bo *dst_bo, in copy_buffer_shader() argument
335 .bo = dst_bo, in copy_buffer_shader()
414 struct radeon_winsys_bo *dst_bo, in radv_copy_buffer() argument
419 copy_buffer_shader(cmd_buffer, src_bo, dst_bo, in radv_copy_buffer()
423 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer()
428 radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, dst_bo); in radv_copy_buffer()
/external/mesa3d/src/gallium/drivers/iris/
Diris_query.c664 struct iris_bo *dst_bo = iris_resource_bo(p_res); in iris_get_query_result_resource() local
679 batch->screen->vtbl.copy_mem_mem(batch, dst_bo, offset, in iris_get_query_result_resource()
695 batch->screen->vtbl.store_data_imm32(batch, dst_bo, offset, q->result); in iris_get_query_result_resource()
697 batch->screen->vtbl.store_data_imm64(batch, dst_bo, offset, q->result); in iris_get_query_result_resource()
720 gen_mi_mem32(rw_bo(dst_bo, offset, IRIS_DOMAIN_OTHER_WRITE)) : in iris_get_query_result_resource()
721 gen_mi_mem64(rw_bo(dst_bo, offset, IRIS_DOMAIN_OTHER_WRITE)); in iris_get_query_result_resource()
Diris_blit.c783 struct iris_bo *dst_bo = iris_resource_bo(p_dst); in iris_resource_copy_region() local
784 batch = get_preferred_batch(ice, dst_bo); in iris_resource_copy_region()
789 screen->vtbl.copy_mem_mem(batch, dst_bo, dstx, iris_resource_bo(p_src), in iris_resource_copy_region()
Diris_screen.h97 struct iris_bo *dst_bo, uint32_t dst_offset,
/external/mesa3d/src/broadcom/vulkan/
Dv3dv_queue.c401 struct v3dv_bo *dst_bo = info->image->mem->bo; in handle_copy_buffer_to_image_cpu_job() local
402 assert(!dst_bo->map || dst_bo->map_size == dst_bo->size); in handle_copy_buffer_to_image_cpu_job()
403 if (!dst_bo->map && !v3dv_bo_map(job->device, dst_bo, dst_bo->size)) in handle_copy_buffer_to_image_cpu_job()
405 void *dst_ptr = dst_bo->map; in handle_copy_buffer_to_image_cpu_job()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_blit.h61 drm_intel_bo *dst_bo,
Dintel_blit.c575 drm_intel_bo *dst_bo, in intel_emit_linear_blit() argument
593 pitch, dst_bo, dst_offset, I915_TILING_NONE, in intel_emit_linear_blit()
609 pitch, dst_bo, dst_offset, I915_TILING_NONE, in intel_emit_linear_blit()
Dintel_buffer_objects.c604 drm_intel_bo *src_bo, *dst_bo; in intel_bufferobj_copy_subdata() local
643 dst_bo = intel_bufferobj_buffer(intel, intel_dst); in intel_bufferobj_copy_subdata()
647 dst_bo, write_offset, in intel_bufferobj_copy_subdata()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_buffer_objects.c644 struct brw_bo *src_bo, *dst_bo; in brw_copy_buffer_subdata() local
649 dst_bo = intel_bufferobj_buffer(brw, intel_dst, write_offset, size, true); in brw_copy_buffer_subdata()
654 dst_bo, write_offset, size); in brw_copy_buffer_subdata()
Dbrw_blorp.c545 struct brw_bo *dst_bo, in brw_blorp_copy_buffers() argument
550 __func__, size, src_bo, src_offset, dst_bo, dst_offset); in brw_blorp_copy_buffers()
554 struct blorp_address dst = { .buffer = dst_bo, .offset = dst_offset }; in brw_blorp_copy_buffers()
1079 struct brw_bo *dst_bo = in brw_blorp_download_miptree() local
1084 if (dst_bo == NULL) in brw_blorp_download_miptree()
1118 brw, dst_bo, dst_format, in brw_blorp_download_miptree()
1174 brw_bo_unreference(dst_bo); in brw_blorp_download_miptree()
Dbrw_blorp.h66 struct brw_bo *dst_bo,
/external/igt-gpu-tools/tests/i915/
Dgem_stress.c164 drm_intel_bo *dst_bo, uint32_t dst_tiling, unsigned dst_pitch, in emit_blt() argument
186 OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in emit_blt()
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_emit.c929 struct fd_bo *dst_bo = fd_resource(dst)->bo; in fd4_mem_to_mem() local
935 OUT_RELOC(ring, dst_bo, dst_off, 0, 0); in fd4_mem_to_mem()

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