/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | intel_copy_image.c | 41 struct intel_mipmap_tree *dst_mt, in copy_miptrees() argument 56 dst_mt, dst_level, dst_z, dst_x, dst_y, in copy_miptrees() 63 dst_mt, dst_level, dst_z, in copy_miptrees() 79 struct intel_mipmap_tree *src_mt, *dst_mt; in intel_copy_image_sub_data() local 99 dst_mt = intel_texture_image(dst_image)->mt; in intel_copy_image_sub_data() 110 dst_mt = intel_renderbuffer(dst_renderbuffer)->mt; in intel_copy_image_sub_data() 116 dst_mt, dst_x, dst_y, dst_z, dst_level, in intel_copy_image_sub_data() 126 assert((src_mt->stencil_mt != NULL) == (dst_mt->stencil_mt != NULL)); in intel_copy_image_sub_data() 128 if (dst_mt->stencil_mt) { in intel_copy_image_sub_data() 130 dst_mt->stencil_mt, dst_x, dst_y, dst_z, dst_level, in intel_copy_image_sub_data()
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D | intel_blit.c | 377 struct intel_mipmap_tree *dst_mt, in emit_miptree_blit() argument 398 intel_miptree_blt_pitch(dst_mt) >= 32768) { in emit_miptree_blit() 422 get_blit_intratile_offset_el(brw, dst_mt, in emit_miptree_blit() 432 dst_mt->surf.row_pitch_B, in emit_miptree_blit() 433 dst_mt->bo, dst_mt->offset + dst_offset, in emit_miptree_blit() 434 dst_mt->surf.tiling, in emit_miptree_blit() 469 struct intel_mipmap_tree *dst_mt, in intel_miptree_blit() argument 476 if (src_mt->surf.samples > 1 || dst_mt->surf.samples > 1) in intel_miptree_blit() 484 mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format); in intel_miptree_blit() 504 intel_miptree_access_raw(brw, dst_mt, dst_level, dst_slice, true); in intel_miptree_blit() [all …]
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D | brw_blorp.c | 277 struct intel_mipmap_tree *dst_mt, in brw_blorp_blit_miptrees() argument 294 dst_mt->surf.samples, _mesa_get_format_name(dst_mt->format), dst_mt, in brw_blorp_blit_miptrees() 302 dst_format = dst_mt->format; in brw_blorp_blit_miptrees() 320 src_mt->surf.samples > 1 && dst_mt->surf.samples <= 1 && in brw_blorp_blit_miptrees() 321 src_mt->format == dst_mt->format && in brw_blorp_blit_miptrees() 330 if (src_mt->surf.samples > 1 && dst_mt->surf.samples <= 1) { in brw_blorp_blit_miptrees() 404 intel_miptree_render_aux_usage(brw, dst_mt, dst_isl_format, in brw_blorp_blit_miptrees() 407 intel_miptree_prepare_access(brw, dst_mt, dst_level, 1, dst_layer, 1, in brw_blorp_blit_miptrees() 413 blorp_surf_for_miptree(brw, &dst_surf, dst_mt, dst_aux_usage, true, in brw_blorp_blit_miptrees() 434 intel_miptree_finish_write(brw, dst_mt, dst_level, dst_layer, 1, in brw_blorp_blit_miptrees() [all …]
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D | brw_blorp.h | 42 struct intel_mipmap_tree *dst_mt, 56 struct intel_mipmap_tree *dst_mt, 72 struct intel_mipmap_tree *dst_mt,
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D | intel_blit.h | 37 struct intel_mipmap_tree *dst_mt, 47 struct intel_mipmap_tree *dst_mt,
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D | intel_mipmap_tree.c | 1265 struct intel_mipmap_tree *dst_mt, in intel_miptree_copy_slice_sw() argument 1271 const unsigned cpp = (isl_format_get_layout(dst_mt->surf.format)->bpb / 8); in intel_miptree_copy_slice_sw() 1280 intel_miptree_map(brw, dst_mt, in intel_miptree_copy_slice_sw() 1291 _mesa_get_format_name(dst_mt->format), in intel_miptree_copy_slice_sw() 1292 dst_mt, dst, dst_stride, in intel_miptree_copy_slice_sw() 1307 intel_miptree_unmap(brw, dst_mt, dst_level, dst_layer); in intel_miptree_copy_slice_sw() 1315 if (dst_mt->stencil_mt) { in intel_miptree_copy_slice_sw() 1319 dst_mt->stencil_mt, dst_level, dst_layer, in intel_miptree_copy_slice_sw() 1328 struct intel_mipmap_tree *dst_mt, in intel_miptree_copy_slice() argument 1343 _mesa_get_srgb_format_linear(dst_mt->format)); in intel_miptree_copy_slice() [all …]
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D | intel_mipmap_tree.h | 487 struct intel_mipmap_tree *dst_mt, 493 struct intel_mipmap_tree *dst_mt);
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
D | intel_mipmap_tree.c | 534 struct intel_mipmap_tree *dst_mt, in intel_miptree_copy_slice_sw() argument 543 int cpp = dst_mt->cpp; in intel_miptree_copy_slice_sw() 552 intel_miptree_map(intel, dst_mt, in intel_miptree_copy_slice_sw() 562 _mesa_get_format_name(dst_mt->format), in intel_miptree_copy_slice_sw() 563 dst_mt, dst, dst_stride, in intel_miptree_copy_slice_sw() 578 intel_miptree_unmap(intel, dst_mt, level, slice); in intel_miptree_copy_slice_sw() 584 struct intel_mipmap_tree *dst_mt, in intel_miptree_copy_slice() argument 602 assert(src_mt->format == dst_mt->format); in intel_miptree_copy_slice() 604 if (dst_mt->compressed) { in intel_miptree_copy_slice() 605 height = ALIGN(height, dst_mt->align_h) / dst_mt->align_h; in intel_miptree_copy_slice() [all …]
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D | intel_blit.c | 222 struct intel_mipmap_tree *dst_mt, in intel_miptree_blit() argument 233 mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format); in intel_miptree_blit() 271 dst_mt->region->pitch > 32768) { in intel_miptree_blit() 280 dst_y = dst_mt->level[dst_level].height - dst_y - height; in intel_miptree_blit() 293 intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice, in intel_miptree_blit() 303 dst_mt->region->pitch, in intel_miptree_blit() 304 dst_mt->region->bo, dst_mt->offset, in intel_miptree_blit() 305 dst_mt->region->tiling, in intel_miptree_blit() 314 dst_mt->format == MESA_FORMAT_B8G8R8A8_UNORM) { in intel_miptree_blit() 315 intel_miptree_set_alpha_to_one(intel, dst_mt, in intel_miptree_blit()
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D | intel_blit.h | 42 struct intel_mipmap_tree *dst_mt,
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D | intel_mipmap_tree.h | 311 struct intel_mipmap_tree *dst_mt, bool invalidate);
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/external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
D | nvc0_surface.c | 236 struct nv50_miptree *dst_mt = nv50_miptree(dst); in nvc0_resource_copy_region() local 251 if (dst_mt->layout_3d) in nvc0_resource_copy_region() 254 drect.base += dst_mt->layer_stride; in nvc0_resource_copy_region()
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/external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
D | nv50_surface.c | 225 struct nv50_miptree *dst_mt = nv50_miptree(dst); in nv50_resource_copy_region() local 240 if (dst_mt->layout_3d) in nv50_resource_copy_region() 243 drect.base += dst_mt->layer_stride; in nv50_resource_copy_region()
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/external/mesa3d/docs/relnotes/ |
D | 11.2.0.rst | 229 \`src_mt->format == dst_mt->format
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