Searched refs:dt_chroma_top_offset (Results 1 – 7 of 7) sorted by relevance
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_vcn_dec_jpeg.c | 49 dec->jpg.dt_chroma_top_offset = chroma->surface.u.gfx9.surf_offset; in radeon_jpeg_get_decode_param()
133 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_DATA), COND0, TYPE0, dec->jpg.dt_chroma_top_offset); in send_cmd_target()
251 set_reg_jpeg(dec, vcnipUVD_JPEG_DATA, COND0, TYPE0, dec->jpg.dt_chroma_top_offset); in send_cmd_target_direct()
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| D | radeon_vcn_dec.h | 358 unsigned int dt_chroma_top_offset; member
809 unsigned dt_chroma_top_offset; member
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| D | radeon_uvd.h | 401 uint32_t dt_chroma_top_offset; member
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| D | radeon_uvd.c | 1464 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type); in si_uvd_set_dt_surfaces()
1471 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; in si_uvd_set_dt_surfaces()
1491 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type); in si_uvd_set_dt_surfaces()
1497 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; in si_uvd_set_dt_surfaces()
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| D | radeon_vcn_dec.c | 1041 decode->dt_chroma_top_offset = chroma->surface.u.gfx9.surf_offset; in rvcn_dec_message_decode()
1049 decode->dt_chroma_bottom_offset = decode->dt_chroma_top_offset; in rvcn_dec_message_decode()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | radeon_uvd.h | 401 uint32_t dt_chroma_top_offset; member
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| D | radeon_uvd.c | 1230 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0); in ruvd_set_dt_surfaces()
1237 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; in ruvd_set_dt_surfaces()
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