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/external/llvm-project/llvm/test/CodeGen/X86/
Dflags-copy-lowering.mir119 CMP64rr %0, %1, implicit-def $eflags
120 %2:gr64 = COPY $eflags
121 ; CHECK-NOT: COPY{{( killed)?}} $eflags
122 ; CHECK: %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
123 ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
124 ; CHECK-NOT: COPY{{( killed)?}} $eflags
126 …ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $…
128 …ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, …
130 $eflags = COPY %2
131 JCC_1 %bb.1, 7, implicit $eflags
[all …]
Dregalloc-copy-hints.mir113 %13:gr32_abcd = MOV32r0 implicit-def dead $eflags
114 TEST8rr %13.sub_8bit, %13.sub_8bit, implicit-def $eflags
115 JCC_1 %bb.2, 5, implicit killed $eflags
125 %15:gr32_abcd = MOV32r0 implicit-def dead $eflags
126 TEST8rr %15.sub_8bit, %15.sub_8bit, implicit-def $eflags
127 JCC_1 %bb.4, 5, implicit killed $eflags
140 %18:gr32_abcd = MOV32r0 implicit-def dead $eflags
141 TEST8rr %18.sub_8bit, %18.sub_8bit, implicit-def $eflags
142 JCC_1 %bb.6, 5, implicit killed $eflags
152 %20:gr32_abcd = MOV32r0 implicit-def dead $eflags
[all …]
Dtail-merge-after-mbp.mir13 ; CHECK: TEST8ri $dl, 1, implicit-def $eflags, implicit killed $edx
14 ; CHECK: JCC_1 %bb.1, 5, implicit $eflags
18 ; CHECK: TEST64rr $rax, $rax, implicit-def $eflags
19 ; CHECK: JCC_1 %bb.1, 4, implicit $eflags
22 ; CHECK: CMP64mi8 killed $rax, 1, $noreg, 8, $noreg, 0, implicit-def $eflags :: (load 8)
23 ; CHECK: JCC_1 %bb.6, 4, implicit $eflags
25 ; CHECK: $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
26 ; CHECK: dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
31 ; CHECK: TEST64rr $rax, $rax, implicit-def $eflags
32 ; CHECK: JCC_1 %bb.1, 4, implicit $eflags
[all …]
Dswitch-lower-peel-top-case.ll15 ; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18568, implicit-def $eflags
16 ; CHECK: JCC_1 %[[PEELED_CASE_LABEL]], 4, implicit $eflags
20 ; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18311, implicit-def $eflags
21 ; CHECK: JCC_1 %[[BB2_LABEL]], 15, implicit $eflags
25 ; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], -8826, implicit-def $eflags
26 ; CHECK: JCC_1 %[[CASE2_LABEL]], 4, implicit $eflags
30 ; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 129, implicit-def $eflags
31 ; CHECK: JCC_1 %[[CASE5_LABEL]], 4, implicit $eflags
35 ; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 8, implicit-def $eflags
36 ; CHECK: JCC_1 %[[CASE1_LABEL]], 4, implicit $eflags
[all …]
Dmachine-region-info.mir7 CMP32ri8 $edi, 40, implicit-def $eflags
8 JCC_1 %bb.7, 5, implicit killed $eflags
12 CMP32ri8 $edi, 1, implicit-def $eflags
13 JCC_1 %bb.11, 5, implicit killed $eflags
17 CMP32ri8 $edi, 2, implicit-def $eflags
18 JCC_1 %bb.5, 5, implicit killed $eflags
22 CMP32ri8 $edi, 90, implicit-def $eflags
23 JCC_1 %bb.5, 5, implicit killed $eflags
29 CMP32ri8 $edi, 4, implicit-def $eflags
30 JCC_1 %bb.11, 5, implicit killed $eflags
[all …]
Dimplicit-null-checks.mir410 …OP 1, %bb.3, {{[0-9]+}}, $eax, $rdi, 1, $noreg, 0, $noreg, implicit-def $eflags :: (load 4 from %i…
417 TEST64rr $rdi, $rdi, implicit-def $eflags
418 JCC_1 %bb.3, 4, implicit $eflags
424 …$eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load …
425 CMP32rr killed $eax, killed $esi, implicit-def $eflags
426 JCC_1 %bb.4, 4, implicit $eflags
451 # CHECK-NEXT: TEST64rr $rdi, $rdi, implicit-def $eflags
452 # CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags
459 TEST64rr $rdi, $rdi, implicit-def $eflags
460 JCC_1 %bb.3, 4, implicit $eflags
[all …]
Ddbg-changes-codegen-branch-folding2.mir95 TEST8rr renamable $al, renamable $al, implicit-def $eflags
96 JCC_1 %bb.4, 5, implicit killed $eflags
103 CMP32rm killed renamable $eax, $rip, 1, $noreg, $noreg, $noreg, implicit-def $eflags
104 JCC_1 %bb.3, 6, implicit $eflags
118 renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
119 TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
120 JCC_1 %bb.1, 5, implicit $eflags
127 TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
128 JCC_1 %bb.1, 5, implicit $eflags
132 liveins: $ecx, $eflags, $rdi
[all …]
Dcopy-eflags-liveinlists.mir4 # Check that $eflags is removed from live-in lists of successor blocks.
6 # CHECK-NOT: liveins: $eflags
60 CMP32rr %3, %9, implicit-def $eflags
61 %10:gr32 = SBB32rr %4, %11, implicit-def $eflags, implicit $eflags
62 %12:gr32 = COPY $eflags
63 %13:gr8 = SETCCr 12, implicit $eflags
65 %15:gr32 = NEG32r %14, implicit-def dead $eflags
66 %16:gr32_abcd = MOV32r0 implicit-def dead $eflags
67 $eflags = COPY %12
69 JCC_1 %bb.3, 12, implicit $eflags
[all …]
Dpr27681.mir34 $esp = frame-setup SUB32ri8 $esp, 36, implicit-def dead $eflags
45 $ebp = SHR32rCL killed $ebp, implicit-def dead $eflags, implicit $cl
46 $ebp = XOR32rr killed $ebp, killed $ebx, implicit-def dead $eflags
47 TEST32rr $edx, $edx, implicit-def $eflags
48 $cl = SETCCr 5, implicit $eflags
51 $cl = OR8rr killed $cl, $bl, implicit-def dead $eflags
53 $esi = ADD32rr killed $esi, killed $edi, implicit-def dead $eflags
55 $edx = SAR32rCL killed $edx, implicit-def dead $eflags, implicit $cl
56 TEST32rr killed $edx, $edx, implicit-def $eflags
57 $cl = SETCCr 5, implicit $eflags
[all …]
Dbranchfolding-debug-invariant.mir8 ; CHECK: TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
9 ; CHECK: JCC_1 %bb.2, 5, implicit $eflags
18 TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
19 JCC_1 %bb.2, 5, implicit killed $eflags
40 ; CHECK: TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
41 ; CHECK: JCC_1 %bb.2, 5, implicit $eflags
52 TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
53 JCC_1 %bb.2, 5, implicit killed $eflags
75 ; CHECK: TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
76 ; CHECK: JCC_1 %bb.2, 5, implicit killed $eflags
[all …]
Dadx-commute.mir83 ; CHECK: dead [[COPY3]].sub_8bit:gr32 = ADD8ri [[COPY3]].sub_8bit, -1, implicit-def $eflags
84 …0-9]+]]:gr32 = ADCX32rr [[ADCX32rr]], [[COPY2]], implicit-def dead $eflags, implicit killed $eflags
85 ; CHECK: [[IMUL32rr:%[0-9]+]]:gr32 = IMUL32rr [[IMUL32rr]], [[COPY2]], implicit-def dead $eflags
93 dead %5:gr8 = ADD8ri killed %4, -1, implicit-def $eflags
94 %6:gr32 = ADCX32rr %1, killed %2, implicit-def dead $eflags, implicit killed $eflags
95 %7:gr32 = IMUL32rr killed %1, killed %6, implicit-def dead $eflags
128 ; CHECK: dead [[COPY3]].sub_8bit:gr32 = ADD8ri [[COPY3]].sub_8bit, -1, implicit-def $eflags
129 …0-9]+]]:gr64 = ADCX64rr [[ADCX64rr]], [[COPY2]], implicit-def dead $eflags, implicit killed $eflags
130 ; CHECK: [[IMUL64rr:%[0-9]+]]:gr64 = IMUL64rr [[IMUL64rr]], [[COPY2]], implicit-def dead $eflags
138 dead %5:gr8 = ADD8ri killed %4, -1, implicit-def $eflags
[all …]
Dpeephole-recurrence.mir96 %5 = MOV32r0 implicit-def dead $eflags
104 TEST32rr %4, %4, implicit-def $eflags
105 JCC_1 %bb.3, 4, implicit $eflags
117 TEST32rr %1, %1, implicit-def $eflags
118 JCC_1 %bb.5, 4, implicit $eflags
130 %10 = ADD32rr %1, %0, implicit-def dead $eflags
134 %3 = ADD32rr %2, killed %10, implicit-def dead $eflags
138 %11 = SUB32ri8 %3, 10, implicit-def $eflags
139 JCC_1 %bb.1, 12, implicit $eflags
143 %12 = MOV32r0 implicit-def dead $eflags
[all …]
Dinstr-symbols.mir33 …ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $…
41 …ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, …
42 …ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $…
49 …ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, …
50 …ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $…
57 …ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, …
68 %6:gr64 = ADD64rr killed %2, killed %3, implicit-def $eflags
69 %7:gr64 = ADD64rr killed %4, killed %5, implicit-def $eflags
70 %8:gr64 = ADD64rr killed %6, killed %7, implicit-def $eflags
Dopt_phis2.mir26 %11:gr32 = SAR32ri %7, 31, implicit-def dead $eflags
27 %12:gr32 = SHR32ri %11, 30, implicit-def dead $eflags
28 %13:gr32 = ADD32rr %7, killed %12, implicit-def dead $eflags
29 %14:gr32 = AND32ri8 %13, -4, implicit-def dead $eflags
30 %15:gr32 = SUB32rr %7, %14, implicit-def dead $eflags
32 %16:gr32 = SUB32ri8 %15, 3, implicit-def $eflags
33 JCC_1 %bb.8, 7, implicit $eflags
/external/llvm-project/llvm/test/DebugInfo/MIR/X86/
Dlivedebugvalues_many_loop_heads.mir114 CMP64ri8 renamable $rdi, 1, implicit-def $eflags, debug-location !17
115 JCC_1 %bb.17, 4, implicit $eflags, debug-location !17
120 CMP64ri8 renamable $rdi, 2, implicit-def $eflags, debug-location !17
121 JCC_1 %bb.16, 4, implicit $eflags, debug-location !17
125 CMP64ri8 renamable $rdi, 3, implicit-def $eflags, debug-location !17
126 JCC_1 %bb.15, 4, implicit $eflags, debug-location !17
130 CMP64ri8 renamable $rdi, 4, implicit-def $eflags, debug-location !17
131 JCC_1 %bb.14, 4, implicit $eflags, debug-location !17
136 CMP64ri8 renamable $rdi, 4, implicit-def $eflags, debug-location !17
137 JCC_1 %bb.13, 4, implicit $eflags, debug-location !17
[all …]
Dmlicm-sink.mir4 ; CHECK: %0:gr64 = nuw ADD64ri8 %9, 4, implicit-def dead $eflags
134 %0:gr64 = nuw ADD64ri8 %9, 4, implicit-def dead $eflags, debug-location !18
135 %1:gr64 = nuw ADD64ri8 %9, 8, implicit-def dead $eflags
136 %2:gr64 = nuw ADD64ri8 %9, 12, implicit-def dead $eflags
137 %3:gr64 = nuw ADD64ri8 %9, 16, implicit-def dead $eflags
138 %4:gr64 = nuw ADD64ri8 %9, 20, implicit-def dead $eflags
139 %5:gr64 = INC64r %8, implicit-def dead $eflags
147 %12:gr64 = SUB64ri8 %10, 50, implicit-def $eflags
148 JCC_1 %bb.4, 7, implicit $eflags
155 %15:gr64 = ADD64rr %14, %13, implicit-def dead $eflags
[all …]
/external/llvm/test/CodeGen/X86/
Dimplicit-null-checks.mir96 …ll, {{[0-9]+}}, killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %i…
104 TEST64rr %rdi, %rdi, implicit-def %eflags
105 JE_1 %bb.3.is_null, implicit %eflags
112 …%eax = AND32rm killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir…
113 CMP32rr killed %eax, killed %esi, implicit-def %eflags
114 JE_1 %bb.4.ret_100, implicit %eflags
142 # CHECK-NEXT: TEST64rr %rdi, %rdi, implicit-def %eflags
143 # CHECK-NEXT: JE_1 %bb.3.is_null, implicit %eflags
151 TEST64rr %rdi, %rdi, implicit-def %eflags
152 JE_1 %bb.3.is_null, implicit %eflags
[all …]
Dpr27681.mir36 %esp = frame-setup SUB32ri8 %esp, 36, implicit-def dead %eflags
48 %ebp = SHR32rCL killed %ebp, implicit-def dead %eflags, implicit %cl
49 %ebp = XOR32rr killed %ebp, killed %ebx, implicit-def dead %eflags
50 TEST32rr %edx, %edx, implicit-def %eflags
51 %cl = SETNEr implicit %eflags
54 %cl = OR8rr killed %cl, %bl, implicit-def dead %eflags
56 %esi = ADD32rr killed %esi, killed %edi, implicit-def dead %eflags
58 %edx = SAR32rCL killed %edx, implicit-def dead %eflags, implicit %cl
59 TEST32rr killed %edx, %edx, implicit-def %eflags
60 %cl = SETNEr implicit %eflags
[all …]
/external/llvm/test/CodeGen/MIR/X86/
Dnewline-handling.mir40 # CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
41 # CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags
44 # CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags
57 CMP32ri8 %edi, 10, implicit-def %eflags
59 JG_1 %bb.2.exit, implicit killed %eflags
64 %eax = MOV32r0 implicit-def dead %eflags
84 # CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
85 # CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags
88 # CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags
100 CMP32ri8 %edi, 10, implicit-def %eflags
[all …]
Dimplicit-register-flag.mir35 ; CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
36 ; CHECK-NEXT: JG_1 %bb.2.exit, implicit %eflags
37 CMP32ri8 %edi, 10, implicit-def %eflags
38 JG_1 %bb.2.exit, implicit %eflags
41 ; CHECK: %eax = MOV32r0 implicit-def %eflags
42 %eax = MOV32r0 implicit-def %eflags
56 ; CHECK: dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
57 dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
65 ; CHECK: dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15w
66 dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15w
/external/llvm-project/llvm/test/CodeGen/MIR/X86/
Dnewline-handling.mir40 # CHECK: CMP32ri8 $edi, 10, implicit-def $eflags
41 # CHECK-NEXT: JCC_1 %bb.2, 15, implicit killed $eflags
44 # CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags
57 CMP32ri8 $edi, 10, implicit-def $eflags
59 JCC_1 %bb.2, 15, implicit killed $eflags
64 $eax = MOV32r0 implicit-def dead $eflags
84 # CHECK: CMP32ri8 $edi, 10, implicit-def $eflags
85 # CHECK-NEXT: JCC_1 %bb.2, 15, implicit killed $eflags
88 # CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags
100 CMP32ri8 $edi, 10, implicit-def $eflags
[all …]
Dimplicit-register-flag.mir35 ; CHECK: CMP32ri8 $edi, 10, implicit-def $eflags
36 ; CHECK-NEXT: JCC_1 %bb.2, 15, implicit $eflags
37 CMP32ri8 $edi, 10, implicit-def $eflags
38 JCC_1 %bb.2, 15, implicit $eflags
41 ; CHECK: $eax = MOV32r0 implicit-def $eflags
42 $eax = MOV32r0 implicit-def $eflags
56 ; CHECK: dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
57 dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
65 ; CHECK: dead $r15 = XOR64rr undef $r15, undef $r15, implicit-def dead $eflags, implicit-def $r15w
66 dead $r15 = XOR64rr undef $r15, undef $r15, implicit-def dead $eflags, implicit-def $r15w
Dauto-successor.mir7 # CHECK: JCC_1 %bb.1, 4, implicit undef $eflags
13 # CHECK: JCC_1 %bb.1, 4, implicit undef $eflags
19 JCC_1 %bb.1, 4, implicit undef $eflags
25 JCC_1 %bb.1, 4, implicit undef $eflags
28 JCC_1 %bb.4, 4, implicit undef $eflags ; condjump+fallthrough to same block
42 JCC_1 %bb.1, 4, implicit undef $eflags
49 JCC_1 %bb.1, 4, implicit undef $eflags
55 JCC_1 %bb.1, 4, implicit undef $eflags
DcopyIRflags.mir11 ; CHECK: $eax = nsw ADD32rr $eax, killed $eax, implicit-def dead $eflags
12 $eax = nsw ADD32rr $eax, killed $eax, implicit-def dead $eflags
13 ; CHECK: $eax = nuw ADD32rr $eax, killed $eax, implicit-def dead $eflags
14 $eax = nuw ADD32rr $eax, killed $eax, implicit-def dead $eflags
15 ; CHECK: $eax = exact SAR32ri $eax, 1, implicit-def dead $eflags
16 $eax = exact SAR32ri $eax, 1, implicit-def dead $eflags
/external/llvm-project/llvm/test/CodeGen/X86/GlobalISel/
Dselect-cmp.mir104 ; CHECK: CMP8rr [[COPY]], [[COPY1]], implicit-def $eflags
105 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
107 ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
140 ; CHECK: CMP16rr [[COPY]], [[COPY1]], implicit-def $eflags
141 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
143 ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
176 ; CHECK: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags
177 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
179 ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
212 ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
[all …]

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