Searched refs:eltsize (Results 1 – 6 of 6) sorted by relevance
| /external/mesa3d/src/util/ |
| D | u_dynarray.h | 105 util_dynarray_resize_bytes(struct util_dynarray *buf, unsigned nelts, size_t eltsize) in util_dynarray_resize_bytes() argument
107 if (unlikely(nelts > UINT_MAX / eltsize)) in util_dynarray_resize_bytes()
110 unsigned newsize = nelts * eltsize; in util_dynarray_resize_bytes()
130 util_dynarray_grow_bytes(struct util_dynarray *buf, unsigned ngrow, size_t eltsize) in util_dynarray_grow_bytes() argument
132 unsigned growbytes = ngrow * eltsize; in util_dynarray_grow_bytes()
134 if (unlikely(ngrow > (UINT_MAX / eltsize) || in util_dynarray_grow_bytes()
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| /external/elfutils/libdw/ |
| D | dwarf_aggregate_size.c | 56 Dwarf_Word eltsize; in array_size() local
58 if (aggregate_size (get_type (die, attr_mem, &type_mem), &eltsize, in array_size()
152 Dwarf_Word stride = eltsize; in array_size()
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| /external/llvm/test/MC/Disassembler/X86/ |
| D | avx-512.txt | 82 # TupleType = T1S, 64-bit eltsize
86 # TupleType = T1S, 32-bit eltsize
94 # TupleType = FV, broadcast, 64-bit eltsize
98 # TupleType = FV, broadcast, 32-bit eltsize
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| /external/llvm-project/llvm/test/MC/Disassembler/X86/ |
| D | avx-512.txt | 86 # TupleType = T1S, 64-bit eltsize
90 # TupleType = T1S, 32-bit eltsize
98 # TupleType = FV, broadcast, 64-bit eltsize
102 # TupleType = FV, broadcast, 32-bit eltsize
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 526 class TypedVecListAsmOperand<int count, string vecty, int lanes, int eltsize>
528 let Name = "TypedVectorList" # count # "_" # lanes # eltsize;
531 = "isTypedVectorList<RegKind::NeonVector, " # count # ", " # lanes # ", " # eltsize # ">";
535 class TypedVecListRegOperand<RegisterClass Reg, int lanes, string eltsize>
537 # eltsize # "'>">;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 510 class TypedVecListAsmOperand<int count, string vecty, int lanes, int eltsize>
512 let Name = "TypedVectorList" # count # "_" # lanes # eltsize;
515 = "isTypedVectorList<RegKind::NeonVector, " # count # ", " # lanes # ", " # eltsize # ">";
519 class TypedVecListRegOperand<RegisterClass Reg, int lanes, string eltsize>
521 # eltsize # "'>">;
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