/external/clang/lib/CodeGen/ |
D | CGDecl.cpp | 905 AutoVarEmission emission = EmitAutoVarAlloca(D); in EmitAutoVarDecl() local 906 EmitAutoVarInit(emission); in EmitAutoVarDecl() 907 EmitAutoVarCleanups(emission); in EmitAutoVarDecl() 956 AutoVarEmission emission(D); in EmitAutoVarAlloca() local 959 emission.IsByRef = isByRef; in EmitAutoVarAlloca() 994 emission.Addr = Address::invalid(); in EmitAutoVarAlloca() 995 assert(emission.wasEmittedAsGlobal()); in EmitAutoVarAlloca() 996 return emission; in EmitAutoVarAlloca() 1000 emission.IsConstantAggregate = true; in EmitAutoVarAlloca() 1025 emission.NRVOFlag = NRVOFlag.getPointer(); in EmitAutoVarAlloca() [all …]
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/external/mesa3d/src/panfrost/midgard/ |
D | midgard_emit.c | 630 struct util_dynarray *emission) in emit_branch() argument 710 memcpy(util_dynarray_grow_bytes(emission, size, 1), &branch, size); in emit_branch() 720 memcpy(util_dynarray_grow_bytes(emission, size, 1), &branch, size); in emit_branch() 731 memcpy(util_dynarray_grow_bytes(emission, size, 1), &branch, size); in emit_branch() 739 struct util_dynarray *emission, in emit_alu_bundle() argument 743 util_dynarray_append(emission, uint32_t, bundle->control | lookahead); in emit_alu_bundle() 771 util_dynarray_append(emission, uint16_t, reg_word); in emit_alu_bundle() 784 emit_branch(ins, ctx, block, bundle, emission); in emit_alu_bundle() 790 memcpy(util_dynarray_grow_bytes(emission, size, 1), &source, size); in emit_alu_bundle() 794 memcpy(util_dynarray_grow_bytes(emission, size, 1), &source, size); in emit_alu_bundle() [all …]
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/external/llvm-project/clang/lib/CodeGen/ |
D | CGDecl.cpp | 1309 AutoVarEmission emission = EmitAutoVarAlloca(D); in EmitAutoVarDecl() local 1310 EmitAutoVarInit(emission); in EmitAutoVarDecl() 1311 EmitAutoVarCleanups(emission); in EmitAutoVarDecl() 1412 AutoVarEmission emission(D); in EmitAutoVarAlloca() local 1415 emission.IsEscapingByRef = isEscapingByRef; in EmitAutoVarAlloca() 1468 emission.Addr = Address::invalid(); in EmitAutoVarAlloca() 1469 assert(emission.wasEmittedAsGlobal()); in EmitAutoVarAlloca() 1470 return emission; in EmitAutoVarAlloca() 1474 emission.IsConstantAggregate = true; in EmitAutoVarAlloca() 1503 emission.NRVOFlag = NRVOFlag.getPointer(); in EmitAutoVarAlloca() [all …]
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/external/llvm/test/CodeGen/X86/ |
D | and-encoding.ll | 3 ; Test that the direct object emission selects the and variant with 8 bit 5 ; We used to get this wrong when using direct object emission, but not when
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/external/llvm/docs/ |
D | Extensions.rst | 225 emission of Variable Length Arrays (VLAs). 230 properly. The emission of this stack probe emission is handled similar to the 231 standard stack probe emission.
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/external/llvm/test/DebugInfo/ARM/ |
D | split-complex.ll | 3 ; REQUIRES: object-emission 21 ; Manually removed to disable location list emission:
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/external/mesa3d/src/panfrost/bifrost/ |
D | bi_pack.c | 1018 struct util_dynarray *emission) in bi_pack_constants() argument 1074 util_dynarray_append(emission, struct bifrost_fmt_constant, quad); in bi_pack_constants() 1082 struct util_dynarray *emission, gl_shader_stage stage, in bi_pack_clause() argument 1102 util_dynarray_append(emission, struct bifrost_fmt1, quad_1); in bi_pack_clause() 1108 constant_index, emission); in bi_pack_clause() 1151 bi_collect_blend_ret_addr(bi_context *ctx, struct util_dynarray *emission, in bi_collect_blend_ret_addr() argument 1174 util_dynarray_num_elements(emission, uint8_t); in bi_collect_blend_ret_addr() 1179 bi_pack(bi_context *ctx, struct util_dynarray *emission) in bi_pack() argument 1198 bi_pack_clause(ctx, clause, next, next_2, emission, ctx->stage, tdd); in bi_pack() 1201 bi_collect_blend_ret_addr(ctx, emission, clause); in bi_pack()
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/external/llvm/test/tools/dsymutil/ARM/ |
D | empty-map.test | 1 # REQUIRES: object-emission
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D | fat-arch-not-found.test | 1 # REQUIRES: object-emission
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/external/llvm/test/DebugInfo/Generic/ |
D | gmlt.test | 1 ; REQUIRES: object-emission
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/external/llvm/test/tools/dsymutil/X86/ |
D | fat-object-input-x86_64h.test | 1 # REQUIRES: object-emission
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D | fat-object-input-x86_64.test | 1 # REQUIRES: object-emission
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D | fat-archive-input-i386.test | 1 # REQUIRES: object-emission
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/external/llvm/test/CodeGen/ARM/ |
D | fastisel-thumb-litpool.ll | 4 ; assertion failure at the time, but could go all the way through to emission,
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/external/mesa3d/docs/relnotes/ |
D | 10.3.2.rst | 69 - gm107/ir: add dnz emission for fmul 70 - gk110/ir: add dnz flag emission for fmul/fmad
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/external/llvm-project/llvm/test/CodeGen/ARM/ |
D | fastisel-thumb-litpool.ll | 4 ; assertion failure at the time, but could go all the way through to emission,
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/external/llvm/test/Linker/ |
D | type-unique-simple2.ll | 1 ; REQUIRES: object-emission
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/external/llvm-project/llvm/test/MC/X86/ |
D | inline-asm-obj.ll | 6 ; We crashed when using direct object emission in the past.
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/external/llvm/test/MC/X86/ |
D | inline-asm-obj.ll | 6 ; We crashed when using direct object emission in the past.
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/external/tensorflow/tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/ |
D | disable_builtin.mlir | 3 // CHECK: 'tfl.add' op is a TFLite builtin op but builtin emission is not enabled
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/external/llvm/test/DebugInfo/X86/ |
D | fission-inline.ll | 5 ; Test the emission of gmlt-like inlining information into the skeleton unit. 11 ; A member function is used to force emission of the declaration of the 14 ; tests the general case of context emission, which is suppressed in gmlt-like
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/external/llvm-project/llvm/test/DebugInfo/X86/ |
D | fission-inline.ll | 5 ; Test the emission of gmlt-like inlining information into the skeleton unit. 11 ; A member function is used to force emission of the declaration of the 14 ; tests the general case of context emission, which is suppressed in gmlt-like
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/external/llvm/test/Assembler/ |
D | named-metadata.ll | 14 ; \31 is the digit '1'. On emission, we escape the first character (to avoid
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/external/llvm-project/llvm/test/Assembler/ |
D | named-metadata.ll | 14 ; \31 is the digit '1'. On emission, we escape the first character (to avoid
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/external/llvm/docs/HistoricalNotes/ |
D | 2001-06-01-GCCOptimizations.txt | 44 Even if we choose to do LLVM code emission from RTL, we will almost 45 certainly want to move LLVM emission from step 8 down until at least CSE
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