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Searched refs:enabled_mask (Results 1 – 25 of 48) sorted by relevance

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/external/mesa3d/src/gallium/drivers/r600/
Dr600_streamout.c85 unsigned num_bufs = util_bitcount(rctx->streamout.enabled_mask); in r600_streamout_buffers_dirty()
86 unsigned num_bufs_appended = util_bitcount(rctx->streamout.enabled_mask & in r600_streamout_buffers_dirty()
120 unsigned enabled_mask = 0, append_bitmask = 0; in r600_set_streamout_targets() local
134 enabled_mask |= 1 << i; in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
330 (rctx->streamout.enabled_mask << 4) | in r600_set_streamout_enable()
331 (rctx->streamout.enabled_mask << 8) | in r600_set_streamout_enable()
332 (rctx->streamout.enabled_mask << 12); in r600_set_streamout_enable()
Dr600_state_common.c492 dst->states.enabled_mask &= ~disable_mask; in r600_bind_sampler_states()
493 dst->states.dirty_mask &= dst->states.enabled_mask; in r600_bind_sampler_states()
494 dst->states.enabled_mask |= new_mask; in r600_bind_sampler_states()
496 dst->states.has_bordercolor_mask &= dst->states.enabled_mask; in r600_bind_sampler_states()
608 rctx->vertex_buffer_state.enabled_mask &= ~disable_mask; in r600_set_vertex_buffers()
609 rctx->vertex_buffer_state.dirty_mask &= rctx->vertex_buffer_state.enabled_mask; in r600_set_vertex_buffers()
610 rctx->vertex_buffer_state.enabled_mask |= new_buffer_mask; in r600_set_vertex_buffers()
651 remaining_mask = dst->views.enabled_mask & disable_mask; in r600_set_sampler_views()
686 (dst->states.enabled_mask & (1 << i)) && in r600_set_sampler_views()
701 dst->views.enabled_mask &= ~disable_mask; in r600_set_sampler_views()
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Dr600_hw_context.c404 ctx->vertex_buffer_state.dirty_mask = ctx->vertex_buffer_state.enabled_mask; in r600_begin_new_cs()
412 constbuf->dirty_mask = constbuf->enabled_mask; in r600_begin_new_cs()
413 samplers->views.dirty_mask = samplers->views.enabled_mask; in r600_begin_new_cs()
414 samplers->states.dirty_mask = samplers->states.enabled_mask; in r600_begin_new_cs()
Dr600_pipe.h384 uint32_t enabled_mask; member
394 uint32_t enabled_mask; member
420 uint32_t enabled_mask; member
428 uint32_t enabled_mask; /* non-NULL buffers */ member
473 uint32_t enabled_mask; member
/external/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_draw.c137 foreach_bit (i, so->enabled_mask & so->writable_mask) in batch_draw_tracking()
140 foreach_bit (i, so->enabled_mask & ~so->writable_mask) in batch_draw_tracking()
145 foreach_bit (i, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask) { in batch_draw_tracking()
156 foreach_bit (i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask) in batch_draw_tracking()
161 foreach_bit (i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask) in batch_draw_tracking()
167 foreach_bit (i, ctx->vtx.vertexbuf.enabled_mask) { in batch_draw_tracking()
490 foreach_bit (i, so->enabled_mask & so->writable_mask) in fd_launch_grid()
493 foreach_bit (i, so->enabled_mask & ~so->writable_mask) in fd_launch_grid()
496 foreach_bit(i, ctx->shaderimg[PIPE_SHADER_COMPUTE].enabled_mask) { in fd_launch_grid()
506 foreach_bit(i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask) in fd_launch_grid()
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Dfreedreno_state.c111 so->enabled_mask &= ~(1 << index); in fd_set_constant_buffer()
115 so->enabled_mask |= 1 << index; in fd_set_constant_buffer()
133 so->enabled_mask &= ~modified_bits; in fd_set_shader_buffers()
153 so->enabled_mask |= BIT(n); in fd_set_shader_buffers()
190 so->enabled_mask |= BIT(n); in fd_set_shader_images()
192 so->enabled_mask &= ~BIT(n); in fd_set_shader_images()
205 so->enabled_mask &= ~mask; in fd_set_shader_images()
358 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, start_slot, count); in fd_set_vertex_buffers()
359 so->count = util_last_bit(so->enabled_mask); in fd_set_vertex_buffers()
584 so->enabled_mask |= BIT(n); in fd_set_global_binding()
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Dfreedreno_context.h64 uint32_t enabled_mask; member
69 uint32_t enabled_mask; member
75 uint32_t enabled_mask; member
81 uint32_t enabled_mask; member
109 uint32_t enabled_mask; member
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_streamout.c79 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
158 unsigned enabled_mask = 0, append_bitmask = 0; in si_set_streamout_targets() local
165 enabled_mask |= 1 << i; in si_set_streamout_targets()
174 sctx->streamout.enabled_mask = enabled_mask; in si_set_streamout_targets()
423 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
424 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
Dsi_descriptors.c250 unsigned mask = samplers->enabled_mask; in si_sampler_views_begin_new_cs()
265 unsigned mask = samplers->enabled_mask & samplers_declared; in si_sampler_views_check_encrypted()
540 samplers->enabled_mask |= 1u << slot; in si_set_sampler_view()
555 samplers->enabled_mask &= ~(1u << slot); in si_set_sampler_view()
597 unsigned mask = samplers->enabled_mask; in si_samplers_update_needs_color_decompress_mask()
630 uint mask = images->enabled_mask; in si_image_views_begin_new_cs()
646 uint mask = images->enabled_mask & images_declared; in si_image_views_check_encrypted()
665 if (images->enabled_mask & (1u << slot)) { in si_disable_shader_image()
673 images->enabled_mask &= ~(1u << slot); in si_disable_shader_image()
794 images->enabled_mask |= 1u << slot; in si_set_shader_image()
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Dsi_debug.c798 sctx->const_and_shader_buffers[processor].enabled_mask >> SI_NUM_SHADER_BUFFERS; in si_dump_descriptors()
799 enabled_shaderbuf = sctx->const_and_shader_buffers[processor].enabled_mask & in si_dump_descriptors()
804 (sctx->const_and_shader_buffers[processor].enabled_mask & in si_dump_descriptors()
807 enabled_samplers = sctx->samplers[processor].enabled_mask; in si_dump_descriptors()
808 enabled_images = sctx->images[processor].enabled_mask; in si_dump_descriptors()
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_image.c198 unsigned enabled_mask = so->enabled_mask; in fd5_emit_images() local
201 while (enabled_mask) { in fd5_emit_images()
202 unsigned index = u_bit_scan(&enabled_mask); in fd5_emit_images()
Dfd5_compute.c171 foreach_bit(i, ctx->global_bindings.enabled_mask) in fd5_launch_grid()
182 foreach_bit(i, ctx->global_bindings.enabled_mask) { in fd5_launch_grid()
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_context.h78 uint32_t enabled_mask; member
85 uint32_t enabled_mask; member
Detnaviv_state.c97 so->enabled_mask &= ~(1 << index); in etna_set_constant_buffer()
108 so->enabled_mask |= 1 << index; in etna_set_constant_buffer()
434 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, start_slot, num_buffers); in etna_set_vertex_buffers()
435 so->count = util_last_bit(so->enabled_mask); in etna_set_vertex_buffers()
Detnaviv_context.c330 foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask) in etna_draw_vbo()
333 foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask) in etna_draw_vbo()
337 foreach_bit(i, ctx->vertex_buffer.enabled_mask) { in etna_draw_vbo()
/external/mesa3d/src/gallium/drivers/v3d/
Dv3dx_state.c298 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, in v3d_set_vertex_buffers()
300 so->count = util_last_bit(so->enabled_mask); in v3d_set_vertex_buffers()
460 so->enabled_mask &= ~(1 << index); in v3d_set_constant_buffer()
465 so->enabled_mask |= 1 << index; in v3d_set_constant_buffer()
1283 so->enabled_mask |= 1 << n; in v3d_set_shader_buffers()
1285 so->enabled_mask &= ~(1 << n); in v3d_set_shader_buffers()
1297 so->enabled_mask &= ~mask; in v3d_set_shader_buffers()
1367 so->enabled_mask |= 1 << n; in v3d_set_shader_images()
1372 so->enabled_mask &= ~(1 << n); in v3d_set_shader_images()
1386 so->enabled_mask = 0; in v3d_set_shader_images()
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Dv3d_context.h241 uint32_t enabled_mask; member
248 uint32_t enabled_mask; member
276 uint32_t enabled_mask; member
301 uint32_t enabled_mask; member
Dv3dx_draw.c180 foreach_bit(i, v3d->constbuf[s].enabled_mask) { in v3d_predraw_check_stage_inputs()
190 foreach_bit(i, v3d->ssbo[s].enabled_mask) { in v3d_predraw_check_stage_inputs()
200 foreach_bit(i, v3d->shaderimg[s].enabled_mask) { in v3d_predraw_check_stage_inputs()
210 foreach_bit(i, v3d->vertexbuf.enabled_mask) { in v3d_predraw_check_stage_inputs()
255 foreach_bit(i, v3d->vertexbuf.enabled_mask) { in v3d_state_reads_resource()
268 foreach_bit(i, v3d->constbuf[s].enabled_mask) { in v3d_state_reads_resource()
279 foreach_bit(i, v3d->ssbo[s].enabled_mask) { in v3d_state_reads_resource()
1176 foreach_bit(i, v3d->ssbo[s].enabled_mask) { in v3d_draw_vbo()
1182 foreach_bit(i, v3d->shaderimg[s].enabled_mask) { in v3d_draw_vbo()
1591 foreach_bit(i, v3d->ssbo[PIPE_SHADER_COMPUTE].enabled_mask) { in v3d_launch_grid()
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/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dfd2_emit.c55 uint32_t enabled_mask = constbuf->enabled_mask; in emit_constants() local
60 while (enabled_mask) { in emit_constants()
61 unsigned index = ffs(enabled_mask) - 1; in emit_constants()
93 enabled_mask &= ~(1 << index); in emit_constants()
/external/mesa3d/src/gallium/drivers/lima/
Dlima_state.c192 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, in lima_set_vertex_buffers()
194 so->count = util_last_bit(so->enabled_mask); in lima_set_vertex_buffers()
435 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, NULL, in lima_state_fini()
Dlima_context.h99 uint32_t enabled_mask; member
/external/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_compute.c153 foreach_bit(i, ctx->global_bindings.enabled_mask) in fd6_launch_grid()
164 foreach_bit(i, ctx->global_bindings.enabled_mask) { in fd6_launch_grid()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_state.c321 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, in vc4_set_vertex_buffers()
323 so->count = util_last_bit(so->enabled_mask); in vc4_set_vertex_buffers()
394 so->enabled_mask &= ~(1 << index); in vc4_set_constant_buffer()
407 so->enabled_mask |= 1 << index; in vc4_set_constant_buffer()
Dvc4_context.h179 uint32_t enabled_mask; member
186 uint32_t enabled_mask; member
/external/mesa3d/src/amd/compiler/
Daco_print_ir.cpp452 if ((exp->enabled_mask & identity_mask) != identity_mask) in print_instr_format_specific()
454 exp->enabled_mask & 0x1 ? 'r' : '*', in print_instr_format_specific()
455 exp->enabled_mask & 0x2 ? 'g' : '*', in print_instr_format_specific()
456 exp->enabled_mask & 0x4 ? 'b' : '*', in print_instr_format_specific()
457 exp->enabled_mask & 0x8 ? 'a' : '*'); in print_instr_format_specific()

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