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Searched refs:esgs_ring_size (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_device.c3120 uint32_t esgs_ring_size, in fill_geom_tess_rings() argument
3139 desc[2] = esgs_ring_size; in fill_geom_tess_rings()
3162 desc[6] = esgs_ring_size; in fill_geom_tess_rings()
3363 uint32_t esgs_ring_size, in radv_emit_gs_ring_sizes() argument
3378 radeon_emit(cs, esgs_ring_size >> 8); in radv_emit_gs_ring_sizes()
3382 radeon_emit(cs, esgs_ring_size >> 8); in radv_emit_gs_ring_sizes()
3592 uint32_t esgs_ring_size, in radv_get_preamble_cs() argument
3656 esgs_ring_size <= queue->esgs_ring_size && in radv_get_preamble_cs()
3664 !esgs_ring_size && !gsvs_ring_size && !needs_tess_rings && in radv_get_preamble_cs()
3699 if (esgs_ring_size > queue->esgs_ring_size) { in radv_get_preamble_cs()
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Dradv_shader.h237 uint32_t esgs_ring_size; member
Dradv_pipeline.c2141 ngg->esgs_ring_size = in gfx10_get_ngg_info()
2150 pipeline->graphics.esgs_ring_size = ngg->esgs_ring_size; in gfx10_get_ngg_info()
2177 unsigned esgs_ring_size = max_gs_waves * 2 * wave_size * in radv_pipeline_init_gs_ring_state() local
2183 esgs_ring_size = align(esgs_ring_size, alignment); in radv_pipeline_init_gs_ring_state()
2187 pipeline->graphics.esgs_ring_size = CLAMP(esgs_ring_size, min_esgs_ring_size, max_size); in radv_pipeline_init_gs_ring_state()
Dradv_private.h711 uint32_t esgs_ring_size; member
1743 unsigned esgs_ring_size; member
Dradv_shader.c1138 sym->size = binary->info.ngg_info.esgs_ring_size; in radv_shader_variant_create()
Dradv_cmd_buffer.c4273 if (pipeline->graphics.esgs_ring_size > cmd_buffer->esgs_ring_size_needed) in radv_CmdBindPipeline()
4274 cmd_buffer->esgs_ring_size_needed = pipeline->graphics.esgs_ring_size; in radv_CmdBindPipeline()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_shaders.c718 out->esgs_ring_size = esgs_lds_size; in gfx9_get_gs_info()
3428 unsigned esgs_ring_size = in si_update_gs_ring_buffers() local
3433 esgs_ring_size = align(esgs_ring_size, alignment); in si_update_gs_ring_buffers()
3436 esgs_ring_size = CLAMP(esgs_ring_size, min_esgs_ring_size, max_size); in si_update_gs_ring_buffers()
3444 bool update_esgs = sctx->chip_class <= GFX8 && esgs_ring_size && in si_update_gs_ring_buffers()
3445 (!sctx->esgs_ring || sctx->esgs_ring->width0 < esgs_ring_size); in si_update_gs_ring_buffers()
3458 esgs_ring_size, sctx->screen->info.pte_fragment_size); in si_update_gs_ring_buffers()
Dsi_shader.h711 unsigned esgs_ring_size; /* in bytes */ member
Dgfx10_shader_ngg.c2092 shader->gs_info.esgs_ring_size = MIN2(max_esverts, max_gsprims * max_verts_per_prim) * in gfx10_ngg_calculate_subgroup_info()
Dsi_shader.c814 sym->size = shader->gs_info.esgs_ring_size * 4; in si_shader_binary_open()
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection_setup.cpp392 unsigned lds_size = ctx->program->info->ngg_info.esgs_ring_size; in setup_vs_variables()
409 unsigned esgs_ring_bytes = ctx->args->shader_info->ngg_info.esgs_ring_size; in setup_gs_variables()
/external/mesa3d/docs/relnotes/
D20.3.0.rst3311 - radeonsi: use the same units for esgs_ring_size and ngg_emit_size
D20.2.0.rst3389 - radeonsi: use the same units for esgs_ring_size and ngg_emit_size