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Searched refs:ext0 (Results 1 – 25 of 73) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/X86/
Dvec_extract-avx.ll24 %ext0 = extractelement <8 x float> %v, i32 0
28 %ins0 = insertelement <4 x float> undef, float %ext0, i32 0
50 %ext0 = extractelement <8 x float> %v, i32 4
54 %ins0 = insertelement <4 x float> undef, float %ext0, i32 0
78 %ext0 = extractelement <8 x i32> %v, i32 4
82 %ins0 = insertelement <4 x i32> undef, i32 %ext0, i32 0
104 %ext0 = extractelement <4 x double> %v, i32 2
106 %ins0 = insertelement <2 x double> undef, double %ext0, i32 0
Dsse41-intrinsics-fast-isel.ll206 …%ext0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32…
207 %sext = sext <8 x i8> %ext0 to <8 x i16>
223 %ext0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
224 %sext = sext <4 x i8> %ext0 to <4 x i32>
240 %ext0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
241 %sext = sext <2 x i8> %ext0 to <2 x i64>
256 %ext0 = shufflevector <8 x i16> %arg0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
257 %sext = sext <4 x i16> %ext0 to <4 x i32>
273 %ext0 = shufflevector <8 x i16> %arg0, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
274 %sext = sext <2 x i16> %ext0 to <2 x i64>
[all …]
Dclear_upper_vector_element_bits.ll32 %ext0 = zext i32 %trunc0 to i64
34 %v0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
67 %ext0 = zext i32 %trunc0 to i64
71 %v0 = insertelement <4 x i64> undef, i64 %ext0, i32 0
103 %ext0 = zext i16 %trunc0 to i32
107 %v0 = insertelement <4 x i32> undef, i32 %ext0, i32 0
155 %ext0 = zext i16 %trunc0 to i32
163 %v0 = insertelement <8 x i32> undef, i32 %ext0, i32 0
200 %ext0 = zext i8 %trunc0 to i16
208 %v0 = insertelement <8 x i16> undef, i16 %ext0, i32 0
[all …]
/external/llvm/test/CodeGen/X86/
Dvec_extract-avx.ll24 %ext0 = extractelement <8 x float> %v, i32 0
28 %ins0 = insertelement <4 x float> undef, float %ext0, i32 0
50 %ext0 = extractelement <8 x float> %v, i32 4
54 %ins0 = insertelement <4 x float> undef, float %ext0, i32 0
78 %ext0 = extractelement <8 x i32> %v, i32 4
82 %ins0 = insertelement <4 x i32> undef, i32 %ext0, i32 0
104 %ext0 = extractelement <4 x double> %v, i32 2
106 %ins0 = insertelement <2 x double> undef, double %ext0, i32 0
Dsse41-intrinsics-fast-isel.ll205 …%ext0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32…
206 %sext = sext <8 x i8> %ext0 to <8 x i16>
222 %ext0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
223 %sext = sext <4 x i8> %ext0 to <4 x i32>
239 %ext0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
240 %sext = sext <2 x i8> %ext0 to <2 x i64>
255 %ext0 = shufflevector <8 x i16> %arg0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
256 %sext = sext <4 x i16> %ext0 to <4 x i32>
272 %ext0 = shufflevector <8 x i16> %arg0, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
273 %sext = sext <2 x i16> %ext0 to <2 x i64>
[all …]
Dclear_upper_vector_element_bits.ll28 %ext0 = zext i32 %trunc0 to i64
30 %v0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
65 %ext0 = zext i16 %trunc0 to i32
69 %v0 = insertelement <4 x i32> undef, i32 %ext0, i32 0
137 %ext0 = zext i8 %trunc0 to i16
145 %v0 = insertelement <8 x i16> undef, i16 %ext0, i32 0
274 %ext0 = zext i4 %trunc0 to i8
290 %v0 = insertelement <16 x i8> undef, i8 %ext0, i32 0
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dvec-shift-07.ll149 %ext0 = sext i8 %elt0 to i64
151 %vec0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
163 %ext0 = sext i16 %elt0 to i64
165 %vec0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
177 %ext0 = sext i32 %elt0 to i64
179 %vec0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
Dknownbits.ll23 %ext0 = extractelement <4 x i32> %zxt0, i32 3
29 %cmp1 = icmp ne i32 %ext0, 0
Dint-sub-02.ll157 %ext0 = sext i32 %frob0 to i64
168 %sub0 = sub i64 %ret, %ext0
Dint-mul-03.ll157 %ext0 = sext i32 %frob0 to i64
168 %mul0 = mul i64 %ret, %ext0
Dint-add-03.ll157 %ext0 = sext i32 %frob0 to i64
168 %add0 = add i64 %ret, %ext0
Dint-add-04.ll157 %ext0 = zext i32 %frob0 to i64
168 %add0 = add i64 %ret, %ext0
Dint-sub-03.ll157 %ext0 = zext i32 %frob0 to i64
168 %sub0 = sub i64 %ret, %ext0
Dfp-conv-03.ll115 %ext0 = fpext float %val0 to fp128
151 store volatile fp128 %ext0, fp128 *%ptr1
Dfp-conv-04.ll115 %ext0 = fpext double %val0 to fp128
151 store volatile fp128 %ext0, fp128 *%ptr1
/external/llvm/test/CodeGen/SystemZ/
Dvec-shift-07.ll149 %ext0 = sext i8 %elt0 to i64
151 %vec0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
163 %ext0 = sext i16 %elt0 to i64
165 %vec0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
177 %ext0 = sext i32 %elt0 to i64
179 %vec0 = insertelement <2 x i64> undef, i64 %ext0, i32 0
Dint-add-03.ll157 %ext0 = sext i32 %frob0 to i64
168 %add0 = add i64 %ret, %ext0
Dint-add-04.ll157 %ext0 = zext i32 %frob0 to i64
168 %add0 = add i64 %ret, %ext0
Dint-sub-03.ll157 %ext0 = zext i32 %frob0 to i64
168 %sub0 = sub i64 %ret, %ext0
Dint-sub-02.ll157 %ext0 = sext i32 %frob0 to i64
168 %sub0 = sub i64 %ret, %ext0
Dint-mul-03.ll157 %ext0 = sext i32 %frob0 to i64
168 %mul0 = mul i64 %ret, %ext0
Dfp-conv-02.ll99 %ext0 = fpext float %val0 to double
135 store volatile double %ext0, double *%ptr1
Dfp-conv-03.ll115 %ext0 = fpext float %val0 to fp128
151 store volatile fp128 %ext0, fp128 *%ptr1
Dfp-conv-04.ll115 %ext0 = fpext double %val0 to fp128
151 store volatile fp128 %ext0, fp128 *%ptr1
/external/deqp/external/vulkancts/modules/vulkan/fragment_shading_rate/
DvktFragmentShadingRateBasic.cpp129 …VkExtent2D Combine (VkExtent2D ext0, VkExtent2D ext1, VkFragmentShadingRateCombinerOpKHR comb…
551 VkExtent2D FSRTestInstance::Combine(VkExtent2D ext0, VkExtent2D ext1, VkFragmentShadingRateCombiner… in Combine() argument
560 return ext0; in Combine()
564 ret = { de::min(ext0.width, ext1.width), de::min(ext0.height, ext1.height) }; in Combine()
567 ret = { de::max(ext0.width, ext1.width), de::max(ext0.height, ext1.height) }; in Combine()
570 ret = { ext0.width * ext1.width, ext0.height * ext1.height }; in Combine()
573 if (ext0.width == 1 && ext1.width == 1) in Combine()
575 if (ext0.height == 1 && ext1.height == 1) in Combine()

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