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Searched refs:extrq (Results 1 – 25 of 35) sorted by relevance

12

/external/llvm-project/llvm/test/tools/llvm-mca/X86/Barcelona/
Dresources-sse4a.s4 extrq %xmm0, %xmm2 label
5 extrq $22, $2, %xmm2 label
22 # CHECK-NEXT: 1 1 0.50 extrq %xmm0, %xmm2
23 # CHECK-NEXT: 1 1 0.50 extrq $22, $2, %xmm2
45 # CHECK-NEXT: - - - 0.50 - 0.50 - - extrq %xmm0, %xmm2
46 # CHECK-NEXT: - - - 0.50 - 0.50 - - extrq $22, $2, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-sse4a.s4 extrq %xmm0, %xmm2 label
5 extrq $22, $2, %xmm2 label
22 # CHECK-NEXT: 1 1 0.50 extrq %xmm0, %xmm2
23 # CHECK-NEXT: 1 1 0.50 extrq $22, $2, %xmm2
45 # CHECK-NEXT: - - - 0.50 - 0.50 - - extrq %xmm0, %xmm2
46 # CHECK-NEXT: - - - 0.50 - 0.50 - - extrq $22, $2, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver2/
Dresources-sse4a.s4 extrq %xmm0, %xmm2 label
5 extrq $22, $2, %xmm2 label
22 # CHECK-NEXT: 1 3 1.00 extrq %xmm0, %xmm2
23 # CHECK-NEXT: 1 3 1.00 extrq $22, $2, %xmm2
50 … - - - - - - - 0.50 1.50 - - extrq %xmm0, %xmm2
51 … - - - - - - - 0.50 1.50 - - extrq $22, $2, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BtVer2/
Dresources-sse4a.s4 extrq %xmm0, %xmm2 label
5 extrq $22, $2, %xmm2 label
22 # CHECK-NEXT: 1 1 0.50 extrq %xmm0, %xmm2
23 # CHECK-NEXT: 1 1 0.50 extrq $22, $2, %xmm2
51 … - - 0.50 0.50 - - - - 0.50 0.50 - extrq %xmm0, %xmm2
52 … - - 0.50 0.50 - - - - 0.50 0.50 - extrq $22, $2, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver1/
Dresources-sse4a.s4 extrq %xmm0, %xmm2 label
5 extrq $22, $2, %xmm2 label
22 # CHECK-NEXT: 1 2 1.00 extrq %xmm0, %xmm2
23 # CHECK-NEXT: 1 2 1.00 extrq $22, $2, %xmm2
49 … - - - - - - - 0.50 1.50 - - extrq %xmm0, %xmm2
50 … - - - - - - - 0.50 1.50 - - extrq $22, $2, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dresources-sse4a.s4 extrq %xmm0, %xmm2 label
5 extrq $22, $2, %xmm2 label
22 # CHECK-NEXT: 1 3 1.50 extrq %xmm0, %xmm2
23 # CHECK-NEXT: 1 3 1.50 extrq $22, $2, %xmm2
60 …0 - - 0.50 0.50 - - - - - - - extrq %xmm0, %xmm2
61 … - - 0.50 0.50 - - - - - - - extrq $22, $2, %xmm2
/external/llvm-project/llvm/test/MC/X86/
Dx86_64-sse4a.s3 extrq $2, $3, %xmm0 label
4 # CHECK: extrq $2, $3, %xmm0
7 extrq %xmm1, %xmm0 label
8 # CHECK: extrq %xmm1, %xmm0
DSSE4a-32.s5 extrq $0, $0, %xmm0 label
9 extrq %xmm1, %xmm1 label
DSSE4a-64.s5 extrq $0, $0, %xmm8 label
9 extrq %xmm8, %xmm8 label
/external/llvm/test/MC/X86/
Dx86_64-sse4a.s3 extrq $2, $3, %xmm0 label
4 # CHECK: extrq $2, $3, %xmm0
7 extrq %xmm1, %xmm0 label
8 # CHECK: extrq %xmm1, %xmm0
/external/llvm/test/CodeGen/X86/
Dsse4a.ll10 ; X32-NEXT: extrq $2, $3, %xmm0
15 ; X64-NEXT: extrq $2, $3, %xmm0
26 ; X32-NEXT: extrq %xmm1, %xmm0
31 ; X64-NEXT: extrq %xmm1, %xmm0
34 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
38 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
Dsse4a-intrinsics-fast-isel.ll12 ; X32-NEXT: extrq $2, $3, %xmm0
17 ; X64-NEXT: extrq $2, $3, %xmm0
27 ; X32-NEXT: extrq %xmm1, %xmm0
32 ; X64-NEXT: extrq %xmm1, %xmm0
35 %res = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %bc)
38 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind readnone
Dvector-shuffle-sse4a.ll13 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
22 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
32 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
41 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
56 ; BTVER1-NEXT: extrq {{.*#+}} xmm1 = xmm1[1],zero,zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u…
57 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
73 ; BTVER1-NEXT: extrq {{.*#+}} xmm1 = xmm1[3],zero,zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u…
74 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
90 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
105 ; BTVER1-NEXT: extrq {{.*#+}} xmm1 = xmm1[2,3],zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u,u,…
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dsse4a.ll10 ; CHECK-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02]
21 ; X86-SSE-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02]
28 ; X86-AVX-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02]
34 ; X64-SSE-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02]
40 ; X64-AVX-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02]
52 ; CHECK-NEXT: extrq %xmm1, %xmm0 # encoding: [0x66,0x0f,0x79,0xc1]
55 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
64 ; X86-SSE-NEXT: extrq %xmm0, %xmm1 # encoding: [0x66,0x0f,0x79,0xc8]
72 ; X86-AVX-NEXT: extrq %xmm0, %xmm1 # encoding: [0x66,0x0f,0x79,0xc8]
79 ; X64-SSE-NEXT: extrq %xmm0, %xmm1 # encoding: [0x66,0x0f,0x79,0xc8]
[all …]
Dvector-shuffle-sse4a.ll22 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
32 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
41 ; AMD10H-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
46 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
61 ; AMD10H-NEXT: extrq {{.*#+}} xmm1 = xmm1[1],zero,zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u…
62 ; AMD10H-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
83 ; AMD10H-NEXT: extrq {{.*#+}} xmm1 = xmm1[3],zero,zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u…
84 ; AMD10H-NEXT: extrq {{.*#+}} xmm0 = xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
105 ; AMD10H-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
110 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
[all …]
Dsse4a-intrinsics-fast-isel.ll12 ; CHECK-NEXT: extrq $2, $3, %xmm0
22 ; CHECK-NEXT: extrq %xmm1, %xmm0
25 %res = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %bc)
28 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind readnone
Dvector-shuffle-combining-sse4a.ll14 ; CHECK-NEXT: extrq {{.*#+}} xmm0 = xmm0[1,2],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
24 ; CHECK-NEXT: extrq {{.*#+}} xmm0 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
37 ; SSSE3-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
58 ; SSSE3-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
Dvector-shuffle-128-v8.ll2924 ; XOP-NEXT: extrq {{.*#+}} xmm0 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
2968 ; XOP-NEXT: extrq {{.*#+}} xmm0 = xmm0[4,5],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
/external/llvm/test/Transforms/InstCombine/
Dx86-sse4a.ll10 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
13 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y) nounwind
21 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> zeroinitializer, <16 x i8> %y) nounwind
29 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> zeroinitializer) nounwind
38 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> <i8 8, i8 15, i8 0, i8 0, i…
46 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> <i64 -1, i64 55>, <16 x i8> <i8 8, i8 15,…
54 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> <i64 -1, i64 undef>, <16 x i8> <i8 16, i8…
248 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
252 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %1, <16 x i8> %y) nounwind
258 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %…
[all …]
/external/llvm-project/llvm/test/Transforms/InstCombine/X86/
Dx86-sse4a.ll10 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 …
13 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y) nounwind
21 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> zeroinitializer, <16 x i8> %y) nounwind
32 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> zeroinitializer) nounwind
41 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> <i8 8, i8 15, i8 0, i8 0, i…
49 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> <i64 -1, i64 55>, <16 x i8> <i8 8, i8 15,…
57 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> <i64 -1, i64 undef>, <16 x i8> <i8 16, i8…
68 …%1 = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> bitcast (<2 x i64> <i64 0, i64 u…
294 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 …
298 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %1, <16 x i8> %y) nounwind
[all …]
/external/llvm/test/MC/Disassembler/X86/
Dx86-64.txt65 # CHECK: extrq $2, $3, %xmm0
68 # CHECK: extrq %xmm1, %xmm0
Dx86-32.txt646 # CHECK: extrq $2, $3, %xmm0
649 # CHECK: extrq %xmm1, %xmm0
/external/llvm-project/llvm/test/MC/Disassembler/X86/
Dx86-64.txt71 # CHECK: extrq $2, $3, %xmm0
74 # CHECK: extrq %xmm1, %xmm0
Dx86-32.txt691 # CHECK: extrq $2, $3, %xmm0
694 # CHECK: extrq %xmm1, %xmm0
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrSSE.td6907 "extrq\t{$idx, $len, $src|$src, $len, $idx}",
6913 "extrq\t{$mask, $src|$src, $mask}",

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