/external/llvm-project/llvm/test/MC/ARM/ |
D | fullfp16-neon.s | 4 vadd.f16 d0, d1, d2 5 vadd.f16 q0, q1, q2 6 @ ARM: vadd.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x11,0xf2] 7 @ ARM: vadd.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x12,0xf2] 8 @ THUMB: vadd.f16 d0, d1, d2 @ encoding: [0x11,0xef,0x02,0x0d] 9 @ THUMB: vadd.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x44,0x0d] 11 vsub.f16 d0, d1, d2 12 vsub.f16 q0, q1, q2 13 @ ARM: vsub.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x31,0xf2] 14 @ ARM: vsub.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x32,0xf2] [all …]
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D | fullfp16.s | 6 vadd.f16 s0, s1, s0 7 @ ARM: vadd.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x30,0xee] 8 @ THUMB: vadd.f16 s0, s1, s0 @ encoding: [0x30,0xee,0x80,0x09] 10 vsub.f16 s0, s1, s0 11 @ ARM: vsub.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x30,0xee] 12 @ THUMB: vsub.f16 s0, s1, s0 @ encoding: [0x30,0xee,0xc0,0x09] 14 vdiv.f16 s0, s1, s0 15 @ ARM: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x80,0xee] 16 @ THUMB: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0xee,0x80,0x09] 18 vmul.f16 s0, s1, s0 [all …]
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D | fullfp16-neon-neg.s | 6 vadd.f16 d0, d1, d2 7 vadd.f16 q0, q1, q2 11 vsub.f16 d0, d1, d2 12 vsub.f16 q0, q1, q2 16 vmul.f16 d0, d1, d2 17 vmul.f16 q0, q1, q2 21 vmul.f16 d1, d2, d3[2] 22 vmul.f16 q4, q5, d6[3] 26 vmla.f16 d0, d1, d2 27 vmla.f16 q0, q1, q2 [all …]
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D | fullfp16-neg.s | 4 vadd.f16 s0, s1, s0 7 vsub.f16 s0, s1, s0 10 vdiv.f16 s0, s1, s0 13 vmul.f16 s0, s1, s0 16 vnmul.f16 s0, s1, s0 19 vmla.f16 s1, s2, s0 22 vmls.f16 s1, s2, s0 25 vnmla.f16 s1, s2, s0 28 vnmls.f16 s1, s2, s0 31 vcmp.f16 s0, s1 [all …]
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D | mve-float.s | 7 # CHECK: vrintn.f16 q1, q0 @ encoding: [0xb6,0xff,0x40,0x24] 8 # CHECK-NOFP-NOT: vrintn.f16 q1, q0 @ encoding: [0xb6,0xff,0x40,0x24] 9 vrintn.f16 q1, q0 15 # CHECK: vrinta.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x05] 16 # CHECK-NOFP-NOT: vrinta.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x05] 17 vrinta.f16 q0, q1 23 # CHECK: vrintm.f16 q0, q5 @ encoding: [0xb6,0xff,0xca,0x06] 24 # CHECK-NOFP-NOT: vrintm.f16 q0, q5 @ encoding: [0xb6,0xff,0xca,0x06] 25 vrintm.f16 q0, q5 31 # CHECK: vrintp.f16 q1, q0 @ encoding: [0xb6,0xff,0xc0,0x27] [all …]
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/external/llvm/test/MC/ARM/ |
D | fullfp16-neon.s | 4 vadd.f16 d0, d1, d2 5 vadd.f16 q0, q1, q2 6 @ ARM: vadd.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x11,0xf2] 7 @ ARM: vadd.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x12,0xf2] 8 @ THUMB: vadd.f16 d0, d1, d2 @ encoding: [0x11,0xef,0x02,0x0d] 9 @ THUMB: vadd.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x44,0x0d] 11 vsub.f16 d0, d1, d2 12 vsub.f16 q0, q1, q2 13 @ ARM: vsub.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x31,0xf2] 14 @ ARM: vsub.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x32,0xf2] [all …]
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D | fullfp16.s | 4 vadd.f16 s0, s1, s0 5 @ ARM: vadd.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x30,0xee] 6 @ THUMB: vadd.f16 s0, s1, s0 @ encoding: [0x30,0xee,0x80,0x09] 8 vsub.f16 s0, s1, s0 9 @ ARM: vsub.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x30,0xee] 10 @ THUMB: vsub.f16 s0, s1, s0 @ encoding: [0x30,0xee,0xc0,0x09] 12 vdiv.f16 s0, s1, s0 13 @ ARM: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x80,0xee] 14 @ THUMB: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0xee,0x80,0x09] 16 vmul.f16 s0, s1, s0 [all …]
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D | fullfp16-neon-neg.s | 6 vadd.f16 d0, d1, d2 7 vadd.f16 q0, q1, q2 11 vsub.f16 d0, d1, d2 12 vsub.f16 q0, q1, q2 16 vmul.f16 d0, d1, d2 17 vmul.f16 q0, q1, q2 21 vmul.f16 d1, d2, d3[2] 22 vmul.f16 q4, q5, d6[3] 26 vmla.f16 d0, d1, d2 27 vmla.f16 q0, q1, q2 [all …]
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D | fullfp16-neg.s | 4 vadd.f16 s0, s1, s0 7 vsub.f16 s0, s1, s0 10 vdiv.f16 s0, s1, s0 13 vmul.f16 s0, s1, s0 16 vnmul.f16 s0, s1, s0 19 vmla.f16 s1, s2, s0 22 vmls.f16 s1, s2, s0 25 vnmla.f16 s1, s2, s0 28 vnmls.f16 s1, s2, s0 31 vcmp.f16 s0, s1 [all …]
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/external/rust/crates/half/src/ |
D | binary16.rs | 34 pub struct f16(u16); struct 38 use super::f16; 41 impl ToPrimitive for f16 { implementation 74 impl FromPrimitive for f16 { implementation 115 use super::f16; 122 pub const DIGITS: u32 = f16::DIGITS; 131 pub const EPSILON: f16 = f16::EPSILON; 137 pub const INFINITY: f16 = f16::INFINITY; 143 pub const MANTISSA_DIGITS: u32 = f16::MANTISSA_DIGITS; 149 pub const MAX: f16 = f16::MAX; [all …]
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D | slice.rs | 14 use crate::{bf16, binary16::convert, f16}; 297 use crate::{bf16, f16}; 300 impl SealedHalfFloatSlice for [f16] {} implementation 307 impl HalfFloatSliceExt for [f16] { implementation 592 pub fn from_bits_mut(bits: &mut [u16]) -> &mut [f16] { in from_bits_mut() argument 606 pub fn to_bits_mut(bits: &mut [f16]) -> &mut [u16] { in to_bits_mut() 618 pub fn from_bits(bits: &[u16]) -> &[f16] { in from_bits() argument 630 pub fn to_bits(bits: &[f16]) -> &[u16] { in to_bits() 637 use crate::{bf16, f16}; 642 f16::E.to_bits(), in test_slice_conversions_f16() [all …]
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/external/XNNPACK/scripts/ |
D | generate-f16-vbinary.sh | 8 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=ADD -D BATCH_TILE=8 -D ACTIVATION=MIN… 9 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=ADD -D BATCH_TILE=16 -D ACTIVATION=MIN… 10 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=DIV -D BATCH_TILE=8 -D ACTIVATION=MIN… 11 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=DIV -D BATCH_TILE=16 -D ACTIVATION=MIN… 12 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MAX -D BATCH_TILE=8 -D ACTIVATION=LIN… 13 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MAX -D BATCH_TILE=16 -D ACTIVATION=LIN… 14 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MIN -D BATCH_TILE=8 -D ACTIVATION=LIN… 15 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MIN -D BATCH_TILE=16 -D ACTIVATION=LIN… 16 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MUL -D BATCH_TILE=8 -D ACTIVATION=MIN… 17 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MUL -D BATCH_TILE=16 -D ACTIVATION=MIN… [all …]
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D | generate-f16-gemm.sh | 8 tools/xngen src/f16-gemm/1x16-aarch64-neonfp16arith-ld32.S.in -D INC=0 -o src/f16-gemm/gen/1x16-min… 9 tools/xngen src/f16-gemm/4x16-aarch64-neonfp16arith-ld32.S.in -D INC=0 -o src/f16-gemm/gen/4x16-min… 10 tools/xngen src/f16-gemm/6x16-aarch64-neonfp16arith-ld32.S.in -D INC=0 -o src/f16-gemm/gen/6x16-min… 11 tools/xngen src/f16-gemm/1x16-aarch64-neonfp16arith-ld32.S.in -D INC=1 -o src/f16-gemm/gen-inc/1x16… 12 tools/xngen src/f16-gemm/4x16-aarch64-neonfp16arith-ld32.S.in -D INC=1 -o src/f16-gemm/gen-inc/4x16… 13 tools/xngen src/f16-gemm/6x16-aarch64-neonfp16arith-ld32.S.in -D INC=1 -o src/f16-gemm/gen-inc/6x16… 15 tools/xngen src/f16-gemm/1x8-aarch64-neonfp16arith-ld64.S.in -D INC=0 -o src/f16-gemm/gen/1x8-minma… 16 tools/xngen src/f16-gemm/4x8-aarch64-neonfp16arith-ld64.S.in -D INC=0 -o src/f16-gemm/gen/4x8-minma… 17 tools/xngen src/f16-gemm/6x8-aarch64-neonfp16arith-ld64.S.in -D INC=0 -o src/f16-gemm/gen/6x8-minma… 18 tools/xngen src/f16-gemm/8x8-aarch64-neonfp16arith-ld64.S.in -D INC=0 -o src/f16-gemm/gen/8x8-minma… [all …]
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D | generate-f16-dwconv.sh | 9 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=4 -D ACCUMULATOR… 10 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=4 -D ACCUMULATOR… 11 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=4 -D ACCUMULATOR… 12 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=4 -D ACCUMULATOR… 14 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=9 -D ACCUMULATOR… 15 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=9 -D ACCUMULATOR… 16 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=9 -D ACCUMULATOR… 17 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=16 -D KERNEL_TILE=9 -D ACCUMULATOR… 19 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=25 -D ACCUMULATO… 20 tools/xngen src/f16-dwconv/up-neonfp16arith.c.in -D CHANNEL_TILE=8 -D KERNEL_TILE=25 -D ACCUMULATO… [all …]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | fullfp16-neon-arm.txt | 4 # CHECK: vadd.f16 d0, d1, d2 5 # CHECK: vadd.f16 q0, q1, q2 9 # CHECK: vsub.f16 d0, d1, d2 10 # CHECK: vsub.f16 q0, q1, q2 14 # CHECK: vmul.f16 d0, d1, d2 15 # CHECK: vmul.f16 q0, q1, q2 19 # CHECK: vmul.f16 d1, d2, d3[2] 20 # CHECK: vmul.f16 q4, q5, d6[3] 24 # CHECK: vmla.f16 d0, d1, d2 25 # CHECK: vmla.f16 q0, q1, q2 [all …]
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D | fullfp16-neon-thumb.txt | 4 # CHECK: vadd.f16 d0, d1, d2 5 # CHECK: vadd.f16 q0, q1, q2 9 # CHECK: vsub.f16 d0, d1, d2 10 # CHECK: vsub.f16 q0, q1, q2 14 # CHECK: vmul.f16 d0, d1, d2 15 # CHECK: vmul.f16 q0, q1, q2 19 # CHECK: vmul.f16 d1, d2, d3[2] 20 # CHECK: vmul.f16 q4, q5, d6[3] 24 # CHECK: vmla.f16 d0, d1, d2 25 # CHECK: vmla.f16 q0, q1, q2 [all …]
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D | fullfp16-thumb.txt | 3 # CHECK: vadd.f16 s0, s1, s0 6 # CHECK: vsub.f16 s0, s1, s0 9 # CHECK: vdiv.f16 s0, s1, s0 12 # CHECK: vmul.f16 s0, s1, s0 15 # CHECK: vnmul.f16 s0, s1, s0 18 # CHECK: vmla.f16 s1, s2, s0 21 # CHECK: vmls.f16 s1, s2, s0 24 # CHECK: vnmla.f16 s1, s2, s0 27 # CHECK: vnmls.f16 s1, s2, s0 30 # CHECK: vcmp.f16 s0, s1 [all …]
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D | fullfp16-arm.txt | 3 # CHECK: vadd.f16 s0, s1, s0 6 # CHECK: vsub.f16 s0, s1, s0 9 # CHECK: vdiv.f16 s0, s1, s0 12 # CHECK: vmul.f16 s0, s1, s0 15 # CHECK: vnmul.f16 s0, s1, s0 18 # CHECK: vmla.f16 s1, s2, s0 21 # CHECK: vmls.f16 s1, s2, s0 24 # CHECK: vnmla.f16 s1, s2, s0 27 # CHECK: vnmls.f16 s1, s2, s0 30 # CHECK: vcmp.f16 s0, s1 [all …]
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/external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
D | fullfp16-neon-thumb.txt | 4 # CHECK: vadd.f16 d0, d1, d2 5 # CHECK: vadd.f16 q0, q1, q2 9 # CHECK: vsub.f16 d0, d1, d2 10 # CHECK: vsub.f16 q0, q1, q2 14 # CHECK: vmul.f16 d0, d1, d2 15 # CHECK: vmul.f16 q0, q1, q2 19 # CHECK: vmul.f16 d1, d2, d3[2] 20 # CHECK: vmul.f16 q4, q5, d6[3] 24 # CHECK: vmla.f16 d0, d1, d2 25 # CHECK: vmla.f16 q0, q1, q2 [all …]
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D | fullfp16-neon-arm.txt | 4 # CHECK: vadd.f16 d0, d1, d2 5 # CHECK: vadd.f16 q0, q1, q2 9 # CHECK: vsub.f16 d0, d1, d2 10 # CHECK: vsub.f16 q0, q1, q2 14 # CHECK: vmul.f16 d0, d1, d2 15 # CHECK: vmul.f16 q0, q1, q2 19 # CHECK: vmul.f16 d1, d2, d3[2] 20 # CHECK: vmul.f16 q4, q5, d6[3] 24 # CHECK: vmla.f16 d0, d1, d2 25 # CHECK: vmla.f16 q0, q1, q2 [all …]
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D | fullfp16-thumb.txt | 3 # CHECK: vadd.f16 s0, s1, s0 6 # CHECK: vsub.f16 s0, s1, s0 9 # CHECK: vdiv.f16 s0, s1, s0 12 # CHECK: vmul.f16 s0, s1, s0 15 # CHECK: vnmul.f16 s0, s1, s0 18 # CHECK: vmla.f16 s1, s2, s0 21 # CHECK: vmls.f16 s1, s2, s0 24 # CHECK: vnmla.f16 s1, s2, s0 27 # CHECK: vnmls.f16 s1, s2, s0 30 # CHECK: vcmp.f16 s0, s1 [all …]
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D | fullfp16-arm.txt | 3 # CHECK: vadd.f16 s0, s1, s0 6 # CHECK: vsub.f16 s0, s1, s0 9 # CHECK: vdiv.f16 s0, s1, s0 12 # CHECK: vmul.f16 s0, s1, s0 15 # CHECK: vnmul.f16 s0, s1, s0 18 # CHECK: vmla.f16 s1, s2, s0 21 # CHECK: vmls.f16 s1, s2, s0 24 # CHECK: vnmla.f16 s1, s2, s0 27 # CHECK: vnmls.f16 s1, s2, s0 30 # CHECK: vcmp.f16 s0, s1 [all …]
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/external/rust/crates/half/benches/ |
D | convert.rs | 10 |b: &mut Bencher<'_>, i: &f32| b.iter(|| f16::from_f32(*i)), in bench_f32_to_f16() 30 |b: &mut Bencher<'_>, i: &f64| b.iter(|| f16::from_f64(*i)), in bench_f64_to_f16() 50 |b: &mut Bencher<'_>, i: &f16| b.iter(|| i.to_f32()), in bench_f16_to_f32() 52 f16::ZERO, in bench_f16_to_f32() 53 f16::NEG_ZERO, in bench_f16_to_f32() 54 f16::ONE, in bench_f16_to_f32() 55 f16::MIN, in bench_f16_to_f32() 56 f16::MAX, in bench_f16_to_f32() 57 f16::MIN_POSITIVE, in bench_f16_to_f32() 58 f16::NEG_INFINITY, in bench_f16_to_f32() [all …]
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/external/llvm-project/llvm/test/CodeGen/Thumb2/ |
D | mve-vecreduce-fadd.ll | 66 ; CHECK-NEXT: vmovx.f16 s4, s0 67 ; CHECK-NEXT: vadd.f16 s0, s0, s4 69 ; CHECK-NEXT: vadd.f16 s0, s2, s0 74 %z = call fast half @llvm.vector.reduce.fadd.f16.v2f16(half %y, <2 x half> %x) 82 ; CHECK-FP-NEXT: vmovx.f16 s4, s1 83 ; CHECK-FP-NEXT: vmovx.f16 s6, s0 84 ; CHECK-FP-NEXT: vadd.f16 s0, s0, s6 85 ; CHECK-FP-NEXT: vadd.f16 s4, s1, s4 87 ; CHECK-FP-NEXT: vadd.f16 s0, s0, s4 88 ; CHECK-FP-NEXT: vadd.f16 s0, s2, s0 [all …]
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D | mve-vecreduce-fminmax.ll | 70 ; CHECK-FP-NEXT: vmovx.f16 s4, s1 71 ; CHECK-FP-NEXT: vmovx.f16 s6, s0 72 ; CHECK-FP-NEXT: vminnm.f16 s4, s1, s4 73 ; CHECK-FP-NEXT: vminnm.f16 s0, s0, s6 74 ; CHECK-FP-NEXT: vminnm.f16 s0, s0, s4 79 ; CHECK-NOFP-NEXT: vmovx.f16 s4, s0 80 ; CHECK-NOFP-NEXT: vminnm.f16 s4, s0, s4 81 ; CHECK-NOFP-NEXT: vmovx.f16 s0, s1 82 ; CHECK-NOFP-NEXT: vminnm.f16 s4, s4, s1 83 ; CHECK-NOFP-NEXT: vminnm.f16 s0, s4, s0 [all …]
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