| /external/llvm-project/llvm/test/CodeGen/SPARC/ |
| D | inlineasm-v9.ll | 32 ; CHECK: fadds %f20, %f20, %f20
33 ; CHECK: faddd %f20, %f20, %f20
37 …tail call void asm sideeffect "fadds $0,$1,$2", "{f20},{f20},{f20}"(float 6.0, float 7.0, float 8.…
38 …tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, doubl…
|
| D | inlineasm.ll | 125 ; CHECK: fadds %f20, %f20, %f20
126 ; CHECK: faddd %f20, %f20, %f20
129 …tail call void asm sideeffect "fadds $0,$1,$2", "{f20},{f20},{f20}"(float 6.0, float 7.0, float 8.…
130 …tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, doubl…
|
| /external/llvm/test/CodeGen/SPARC/ |
| D | LeonFixFSMULDPassUT.ll | 4 ; CHECK: fstod %f20, %f2
7 ; CHECK: fstod %f20, %f0
16 …%mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* …
22 ; CHECK: fstod %f20, %f2
25 ; CHECK: fstod %f20, %f0
28 …%mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* …
|
| D | LeonReplaceFMULSPassUT.ll | 4 ; CHECK: fstod %f20, %f2
7 ; CHECK: fstod %f20, %f0
16 …%mul = tail call double asm sideeffect "fmuls $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* %…
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-xfail-mips64r2.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
34 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
38 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
40 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
50 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
55 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
60 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-xfail-mips64r3.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
34 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
38 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
40 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
50 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
55 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
60 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| D | valid-xfail-mips64r5.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
34 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
38 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
40 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
50 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
55 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
60 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| D | valid-xfail-mips64r5.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-xfail-mips64r2.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-xfail-mips64r3.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
|
| /external/llvm-project/llvm/test/MC/Mips/mips5/ |
| D | valid.s | 46 …c.f.d $fcc4, $f10, $f20 # CHECK: c.f.d $fcc4, $f10, $f20 # encoding: [0x46,0x34,0…
52 …c.nge.d $fcc5, $f20, $f16 # CHECK: c.nge.d $fcc5, $f20, $f16 # encoding: [0x46,0x30,0…
61 …c.ole.s $fcc3, $f7, $f20 # CHECK: c.ole.s $fcc3, $f7, $f20 # encoding: [0x46,0x14,0…
63 …c.olt.s $fcc6, $f20, $f7 # CHECK: c.olt.s $fcc6, $f20, $f7 # encoding: [0x46,0x07,0…
80 … ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e]
100 … cvt.w.d $f20,$f14 # CHECK: cvt.w.d $f20, $f14 # encoding: [0x46,0x20,0x75,0x24]
102 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24]
117 div.d $f29,$f20,$f27
195 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
201 mov.d $f20,$f14
[all …]
|
| /external/llvm-project/llvm/test/MC/Mips/mips4/ |
| D | valid.s | 46 …c.f.d $fcc4, $f10, $f20 # CHECK: c.f.d $fcc4, $f10, $f20 # encoding: [0x46,0x34,0…
52 …c.nge.d $fcc5, $f20, $f16 # CHECK: c.nge.d $fcc5, $f20, $f16 # encoding: [0x46,0x30,0…
61 …c.ole.s $fcc3, $f7, $f20 # CHECK: c.ole.s $fcc3, $f7, $f20 # encoding: [0x46,0x14,0…
63 …c.olt.s $fcc6, $f20, $f7 # CHECK: c.olt.s $fcc6, $f20, $f7 # encoding: [0x46,0x07,0…
80 … ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e]
100 … cvt.w.d $f20,$f14 # CHECK: cvt.w.d $f20, $f14 # encoding: [0x46,0x20,0x75,0x24]
102 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24]
117 div.d $f29,$f20,$f27
194 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
200 mov.d $f20,$f14
[all …]
|
| /external/llvm-project/llvm/test/MC/Mips/mips64/ |
| D | valid.s | 46 …c.f.d $fcc4, $f10, $f20 # CHECK: c.f.d $fcc4, $f10, $f20 # encoding: [0x46,0x34,0…
52 …c.nge.d $fcc5, $f20, $f16 # CHECK: c.nge.d $fcc5, $f20, $f16 # encoding: [0x46,0x30,0…
61 …c.ole.s $fcc3, $f7, $f20 # CHECK: c.ole.s $fcc3, $f7, $f20 # encoding: [0x46,0x14,0…
63 …c.olt.s $fcc6, $f20, $f7 # CHECK: c.olt.s $fcc6, $f20, $f7 # encoding: [0x46,0x07,0…
80 … ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e]
102 … cvt.w.d $f20,$f14 # CHECK: cvt.w.d $f20, $f14 # encoding: [0x46,0x20,0x75,0x24]
104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24]
122 div.d $f29,$f20,$f27
206 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
213 mov.d $f20,$f14
[all …]
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r2/ |
| D | valid.s | 47 …c.f.d $fcc4, $f10, $f20 # CHECK: c.f.d $fcc4, $f10, $f20 # encoding: [0x46,0x34,0…
53 …c.nge.d $fcc5, $f20, $f16 # CHECK: c.nge.d $fcc5, $f20, $f16 # encoding: [0x46,0x30,0…
62 …c.ole.s $fcc3, $f7, $f20 # CHECK: c.ole.s $fcc3, $f7, $f20 # encoding: [0x46,0x14,0…
64 …c.olt.s $fcc6, $f20, $f7 # CHECK: c.olt.s $fcc6, $f20, $f7 # encoding: [0x46,0x07,0…
81 … ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e]
103 … cvt.w.d $f20,$f14 # CHECK: cvt.w.d $f20, $f14 # encoding: [0x46,0x20,0x75,0x24]
105 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24]
107 …cvt.ps.s $f4,$f18,$f20 # CHECK: cvt.ps.s $f4, $f18, $f20 # encoding: [0x46,0x14,0x91,0x26]
137 div.d $f29,$f20,$f27
242 mov.d $f20,$f14
[all …]
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r5/ |
| D | valid.s | 46 …c.f.d $fcc4, $f10, $f20 # CHECK: c.f.d $fcc4, $f10, $f20 # encoding: [0x46,0x34,0…
52 …c.nge.d $fcc5, $f20, $f16 # CHECK: c.nge.d $fcc5, $f20, $f16 # encoding: [0x46,0x30,0…
61 …c.ole.s $fcc3, $f7, $f20 # CHECK: c.ole.s $fcc3, $f7, $f20 # encoding: [0x46,0x14,0…
63 …c.olt.s $fcc6, $f20, $f7 # CHECK: c.olt.s $fcc6, $f20, $f7 # encoding: [0x46,0x07,0…
80 … ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e]
102 … cvt.w.d $f20,$f14 # CHECK: cvt.w.d $f20, $f14 # encoding: [0x46,0x20,0x75,0x24]
104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24]
106 …cvt.ps.s $f4,$f18,$f20 # CHECK: cvt.ps.s $f4, $f18, $f20 # encoding: [0x46,0x14,0x91,0x26]
130 div.d $f29,$f20,$f27
237 mov.d $f20,$f14
[all …]
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r3/ |
| D | valid.s | 46 …c.f.d $fcc4, $f10, $f20 # CHECK: c.f.d $fcc4, $f10, $f20 # encoding: [0x46,0x34,0…
52 …c.nge.d $fcc5, $f20, $f16 # CHECK: c.nge.d $fcc5, $f20, $f16 # encoding: [0x46,0x30,0…
61 …c.ole.s $fcc3, $f7, $f20 # CHECK: c.ole.s $fcc3, $f7, $f20 # encoding: [0x46,0x14,0…
63 …c.olt.s $fcc6, $f20, $f7 # CHECK: c.olt.s $fcc6, $f20, $f7 # encoding: [0x46,0x07,0…
80 … ceil.w.s $f6,$f20 # CHECK: ceil.w.s $f6, $f20 # encoding: [0x46,0x00,0xa1,0x8e]
102 … cvt.w.d $f20,$f14 # CHECK: cvt.w.d $f20, $f14 # encoding: [0x46,0x20,0x75,0x24]
104 … cvt.w.s $f20,$f24 # CHECK: cvt.w.s $f20, $f24 # encoding: [0x46,0x00,0xc5,0x24]
106 …cvt.ps.s $f4,$f18,$f20 # CHECK: cvt.ps.s $f4, $f18, $f20 # encoding: [0x46,0x14,0x91,0x26]
130 div.d $f29,$f20,$f27
235 mov.d $f20,$f14
[all …]
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| D | valid-xfail-mips32r2.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| D | valid-xfail-mips32r5.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| D | valid-xfail-mips32r3.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
|
| /external/llvm-project/llvm/test/MC/Mips/mips3d/ |
| D | valid.s | 6 cvt.pw.ps $f5, $f20 # CHECK: cvt.pw.ps $f5, $f20 # encoding: [0x46,0xc0,0xa1,0x64]
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | valid.s | 37 cvt.w.d $f20,$f14
38 cvt.w.s $f20,$f24
40 div.d $f29,$f20,$f27
66 mov.d $f20,$f14
74 mul.d $f20,$f20,$f16
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| D | fpu_asm.h | 22 stfd f20,(stack_size + STACK_FRAME_MIN_SIZE - 88)(%r1); \
42 lfd f20,(stack_size + STACK_FRAME_MIN_SIZE - 88)(%r1); \
61 lfd f20,48(r3)
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| D | valid-xfail-mips32r2.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 44 ceil.w.s $f6,$f20
51 cvt.w.d $f20,$f14
52 cvt.w.s $f20,$f24
54 div.d $f29,$f20,$f27
86 mov.d $f20,$f14
94 mul.d $f20,$f20,$f16
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| D | valid-xfail-mips32r3.txt | 18 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
20 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
39 0x46 0xd4 0x66 0x39 # CHECK: c.ngle.ps $fcc6, $f12, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2
|