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/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r3/
Dvalid-fp64.txt20 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
24 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
27 0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26
28 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
29 0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26
Dvalid-fp64-el.txt20 0xa0 0xd3 0xc0 0x46 # CHECK: cvt.s.pu $f14, $f26
24 0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28
27 0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26
28 0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26
29 0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26
Dvalid-xfail-mips32r3.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
76 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r2/
Dvalid-fp64-el.txt20 0xa0 0xd3 0xc0 0x46 # CHECK: cvt.s.pu $f14, $f26
24 0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28
27 0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26
28 0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26
29 0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26
Dvalid-fp64.txt20 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
24 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
27 0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26
28 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
29 0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26
Dvalid-xfail-mips32r2.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
76 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r5/
Dvalid-fp64.txt20 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
24 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
27 0x46 0xda 0x71 0x00 # CHECK: add.ps $f4, $f14, $f26
28 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
29 0x46 0xda 0x71 0x02 # CHECK: mul.ps $f4, $f14, $f26
Dvalid-fp64-el.txt20 0xa0 0xd3 0xc0 0x46 # CHECK: cvt.s.pu $f14, $f26
24 0x2d 0xd0 0xdc 0x46 # CHECK: plu.ps $f0, $f26, $f28
27 0x00 0x71 0xda 0x46 # CHECK: add.ps $f4, $f14, $f26
28 0x02 0x71 0xda 0x46 # CHECK: mul.ps $f4, $f14, $f26
29 0x01 0x71 0xda 0x46 # CHECK: sub.ps $f4, $f14, $f26
Dvalid-xfail-mips32r5.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
76 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-xfail-mips64r5.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-xfail-mips64r2.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-xfail-mips64r3.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm/test/MC/Mips/mips3/
Dinvalid-mips5-wrong-error.s16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips4/
Dinvalid-mips5-wrong-error.s16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips5-wrong-error.s16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips5-wrong-error.s16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5-wrong-error.s19 … c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 … c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
45 … plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
46 … pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
48 … sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Disassembler/Mips/mips32r2/
Dvalid-xfail-mips32r2.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm/test/MC/Disassembler/Mips/mips32r3/
Dvalid-xfail-mips32r3.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm/test/MC/Disassembler/Mips/mips32r5/
Dvalid-xfail-mips32r5.txt37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-xfail-mips64r2.txt36 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
47 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
49 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
50 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
61 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
65 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
66 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-xfail-mips64r3.txt36 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
47 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
49 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
50 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
61 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
65 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
66 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-xfail-mips64r5.txt36 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26
47 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26
49 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26
50 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
61 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
65 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28
66 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
/external/llvm-project/llvm/test/MC/Mips/mips4/
Dinvalid-mips5.s16 …plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
17 …pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
19 …sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm-project/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5.s17 …plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
18 …pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
20 …sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…

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