| /external/swiftshader/third_party/marl/src/ |
| D | osfiber_asm_mips64.S | 46 s.d $f31, MARL_REG_f30($a0)
47 s.d $f31, MARL_REG_f31($a0)
72 l.d $f31, MARL_REG_f30($v0)
73 l.d $f31, MARL_REG_f31($v0)
|
| D | osfiber_asm_mips64.h | 70 uintptr_t f31; member
114 static_assert(offsetof(marl_fiber_context, f31) == MARL_REG_f31,
|
| /external/llvm/test/MC/Sparc/ |
| D | sparc-vis.s | 3 ! CHECK: fzeros %f31 ! encoding: [0xbf,0xb0,0x0c,0x20]
4 fzeros %f31
|
| /external/llvm-project/llvm/test/MC/Sparc/ |
| D | sparc-vis.s | 3 ! CHECK: fzeros %f31 ! encoding: [0xbf,0xb0,0x0c,0x20]
4 fzeros %f31
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-xfail.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
44 0x46 0xce 0xfe 0x3a # CHECK: c.seq.ps $fcc6, $f31, $f14
55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
58 0x46 0xd3 0xff 0xd3 # CHECK: movn.ps $f31, $f31, $19
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-xfail.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
44 0x46 0xce 0xfe 0x3a # CHECK: c.seq.ps $fcc6, $f31, $f14
55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
58 0x46 0xd3 0xff 0xd3 # CHECK: movn.ps $f31, $f31, $19
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| D | valid-xfail-mips4.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
32 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
33 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| D | fpu_asm.h | 11 stfd f31,(stack_size + STACK_FRAME_MIN_SIZE)(%r1); \
31 lfd f31,(stack_size + STACK_FRAME_MIN_SIZE)(%r1); \
72 lfd f31,136(r3)
|
| /external/llvm/test/MC/Mips/ |
| D | mips-reginfo-fp32.s | 33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
|
| /external/llvm-project/llvm/test/MC/Mips/ |
| D | mips-reginfo-fp32.s | 33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
|
| /external/llvm-project/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips5-wrong-error.s | 21 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
|
| /external/llvm-project/llvm/test/MC/Mips/mips3/ |
| D | invalid-mips5-wrong-error.s | 21 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm-project/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips5-wrong-error.s | 21 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
|
| /external/google-breakpad/src/common/android/include/asm-mips/ |
| D | fpregdef.h | 68 #define fs5f $f31
112 #define fs7 $f31
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips32r2.s | 9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
10 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | vsx-spill.ll | 10 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
31 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
51 …0},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{v0},~{v1},~{v2},…
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips5-wrong-error.s | 24 … c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
33 … movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips32r2.s | 10 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
11 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | vsx-spill.ll | 21 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
44 ; CHECK-P9-FISL: stfd f31, -8(r1)
54 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
85 …0},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{v0},~{v1},~{v2},…
|
| /external/llvm/test/MC/Mips/mips3/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|