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Searched refs:fcmla (Results 1 – 25 of 26) sorted by relevance

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/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dfcmla.s10 fcmla z0.h, p0/m, z0.h, z0.h, #0 label
16 fcmla z0.s, p0/m, z0.s, z0.s, #0 label
22 fcmla z0.d, p0/m, z0.d, z0.d, #0 label
28 fcmla z0.h, p0/m, z1.h, z2.h, #90 label
34 fcmla z0.s, p0/m, z1.s, z2.s, #90 label
40 fcmla z0.d, p0/m, z1.d, z2.d, #90 label
46 fcmla z29.h, p7/m, z30.h, z31.h, #180 label
52 fcmla z29.s, p7/m, z30.s, z31.s, #180 label
58 fcmla z29.d, p7/m, z30.d, z31.d, #180 label
64 fcmla z31.h, p7/m, z31.h, z31.h, #270 label
[all …]
Dfcmla-diagnostics.s6 fcmla z0.d, p8/m, z1.d, z2.d, #0 label
15 fcmla z0.d, p0/m, z1.d, z2.d, #360 label
20 fcmla z0.d, p0/m, z1.d, z2.d, #450 label
29 fcmla z0.h, z1.h, z2.h[-1], #0 label
34 fcmla z0.h, z1.h, z2.h[4], #0 label
39 fcmla z0.s, z1.s, z2.s[-1], #0 label
44 fcmla z0.s, z1.s, z2.s[2], #0 label
49 fcmla z0.d, z1.d, z2.d[0], #0 label
59 fcmla z21.s, z10.s, z5.s[1], #90 label
/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.3a-complex.s3 fcmla v0.4h, v1.4h, v2.4h, #0 label
4 fcmla v0.8h, v1.8h, v2.8h, #0 label
5 fcmla v0.2s, v1.2s, v2.2s, #0 label
6 fcmla v0.4s, v1.4s, v2.4s, #0 label
7 fcmla v0.2d, v1.2d, v2.2d, #0 label
8 fcmla v0.2s, v1.2s, v2.2s, #0 label
9 fcmla v0.2s, v1.2s, v2.2s, #90 label
10 fcmla v0.2s, v1.2s, v2.2s, #180 label
11 fcmla v0.2s, v1.2s, v2.2s, #270 label
19 fcmla v0.4h, v1.4h, v2.h[0], #0 label
[all …]
Darmv8.3a-complex_missing.s3 fcmla v0.4h, v1.4h, v2.4h, #0 label
4 fcmla v0.8h, v1.8h, v2.8h, #0 label
5 fcmla v0.2s, v1.2s, v2.2s, #0 label
6 fcmla v0.4s, v1.4s, v2.4s, #0 label
7 fcmla v0.2d, v1.2d, v2.2d, #0 label
8 fcmla v0.2s, v1.2s, v2.2s, #0 label
9 fcmla v0.2s, v1.2s, v2.2s, #90 label
10 fcmla v0.2s, v1.2s, v2.2s, #180 label
11 fcmla v0.2s, v1.2s, v2.2s, #270 label
19 fcmla v0.4h, v1.4h, v2.h[0], #0 label
[all …]
Darmv8.3a-complex_nofp16.s2 fcmla v0.2s, v1.2s, v2.2s, #0 label
3 fcmla v0.4s, v1.4s, v2.4s, #0 label
4 fcmla v0.2d, v1.2d, v2.2d, #0 label
5 fcmla v0.2s, v1.2s, v2.2s, #0 label
6 fcmla v0.2s, v1.2s, v2.2s, #90 label
7 fcmla v0.2s, v1.2s, v2.2s, #180 label
8 fcmla v0.2s, v1.2s, v2.2s, #270 label
14 fcmla v0.4s, v1.4s, v2.s[0], #0 label
15 fcmla v0.4s, v1.4s, v2.s[0], #90 label
16 fcmla v0.4s, v1.4s, v2.s[0], #180 label
[all …]
Darmv8.3a-complex_bad.s2 fcmla v0.2s, v1.2s, v2.2s, #1 label
3 fcmla v0.2s, v1.2s, v2.2s, #360 label
4 fcmla v0.2s, v1.2s, v2.2s, #-90 label
10 fcmla v0.4h, v1.4h, v2.h[2], #0 label
11 fcmla v0.8h, v1.8h, v2.h[4], #0 label
12 fcmla v0.4s, v1.4s, v2.s[2], #0 label
13 fcmla v0.4s, v1.4s, v2.s[0], #1 label
14 fcmla v0.4s, v1.4s, v2.s[0], #360 label
15 fcmla v0.4s, v1.4s, v2.s[0], #-90 label
Darmv8.3a-complex_nofp16_bad.s2 fcmla v0.4h, v1.4h, v2.4h, #0 label
3 fcmla v0.8h, v1.8h, v2.8h, #0 label
6 fcmla v0.4h, v1.4h, v2.h[0], #0 label
7 fcmla v0.8h, v1.8h, v2.h[0], #0 label
8 fcmla v0.4h, v1.4h, v2.h[1], #0 label
9 fcmla v0.8h, v1.8h, v2.h[3], #0 label
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darmv8.3a-complex.txt8 # FP16: fcmla v0.4h, v1.4h, v2.4h, #0
12 # FP16: fcmla v0.8h, v1.8h, v2.8h, #0
16 # CHECK: fcmla v0.2s, v1.2s, v2.2s, #0
19 # CHECK: fcmla v0.4s, v1.4s, v2.4s, #0
22 # CHECK: fcmla v0.2d, v1.2d, v2.2d, #0
27 # CHECK: fcmla v0.2s, v1.2s, v2.2s, #0
30 # CHECK: fcmla v0.2s, v1.2s, v2.2s, #90
33 # CHECK: fcmla v0.2s, v1.2s, v2.2s, #180
36 # CHECK: fcmla v0.2s, v1.2s, v2.2s, #270
68 # FP16: fcmla v0.4h, v1.4h, v2.h[0], #0
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-fp-arith.ll152 ; CHECK: fcmla z0.h, p0/m, z1.h, z2.h, #90
154 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %pg,
164 ; CHECK: fcmla z0.s, p0/m, z1.s, z2.s, #180
166 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1> %pg,
176 ; CHECK: fcmla z0.d, p0/m, z1.d, z2.d, #270
178 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1> %pg,
192 ; CHECK: fcmla z0.h, z1.h, z2.h[3], #0
194 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.lane.nxv8f16(<vscale x 8 x half> %a,
204 ; CHECK: fcmla z0.s, z1.s, z2.s[1], #90
206 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.lane.nxv4f32(<vscale x 4 x float> %a,
[all …]
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc333 __ fcmla(z5.VnH(), z0.VnH(), z5.VnH(), 2, 180); in TEST() local
336 __ fcmla(z10.VnS(), z8.VnS(), z10.VnS(), 1, 270); in TEST() local
339 __ fcmla(z12.VnH(), z12.VnH(), z3.VnH(), 2, 180); in TEST() local
342 __ fcmla(z8.VnS(), z8.VnS(), z1.VnS(), 1, 270); in TEST() local
1224 __ fcmla(z10.VnH(), z22.VnH(), z3.VnH(), 2, 180); in TEST() local
1227 __ fcmla(z12.VnS(), z3.VnS(), z10.VnS(), 1, 270); in TEST() local
1647 __ fcmla(z21.VnH(), z31.VnH(), z6.VnH(), 2, 180); in TEST() local
1650 __ fcmla(z16.VnS(), z11.VnS(), z6.VnS(), 1, 270); in TEST() local
Dtest-disasm-sve-aarch64.cc1383 COMPARE_PREFIX(fcmla(z19.VnH(), p7.Merging(), z16.VnH(), z0.VnH(), 90), in TEST()
1385 COMPARE_PREFIX(fcmla(z19.VnS(), p7.Merging(), z16.VnS(), z0.VnS(), 90), in TEST()
1387 COMPARE_PREFIX(fcmla(z19.VnD(), p7.Merging(), z16.VnD(), z0.VnD(), 90), in TEST()
1390 COMPARE_PREFIX(fcmla(z20.VnD(), p6.Merging(), z15.VnD(), z1.VnD(), 0), in TEST()
1392 COMPARE_PREFIX(fcmla(z20.VnD(), p6.Merging(), z15.VnD(), z1.VnD(), 180), in TEST()
1394 COMPARE_PREFIX(fcmla(z20.VnD(), p6.Merging(), z15.VnD(), z1.VnD(), 270), in TEST()
1403 COMPARE_PREFIX(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 0, 0), in TEST()
1405 COMPARE_PREFIX(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 1, 0), in TEST()
1407 COMPARE_PREFIX(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 2, 90), in TEST()
1409 COMPARE_PREFIX(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 0, 270), in TEST()
[all …]
Dtest-cpu-features-aarch64.cc3537 TEST_FP_FCMA_NEON(fcmla_0, fcmla(v0.V4S(), v1.V4S(), v2.S(), 0, 180))
3538 TEST_FP_FCMA_NEON(fcmla_1, fcmla(v0.V2S(), v1.V2S(), v2.V2S(), 90))
3539 TEST_FP_FCMA_NEON(fcmla_2, fcmla(v0.V4S(), v1.V4S(), v2.V4S(), 90))
3540 TEST_FP_FCMA_NEON(fcmla_3, fcmla(v0.V2D(), v1.V2D(), v2.V2D(), 90))
3776 TEST_FP_FCMA_NEON_NEONHALF(fcmla_0, fcmla(v0.V4H(), v1.V4H(), v2.H(), 0, 0))
3777 TEST_FP_FCMA_NEON_NEONHALF(fcmla_1, fcmla(v0.V8H(), v1.V8H(), v2.H(), 2, 180))
3778 TEST_FP_FCMA_NEON_NEONHALF(fcmla_2, fcmla(v0.V4H(), v1.V4H(), v2.V4H(), 180))
3779 TEST_FP_FCMA_NEON_NEONHALF(fcmla_3, fcmla(v0.V8H(), v1.V8H(), v2.V8H(), 0))
/external/vixl/src/aarch64/
Dlogic-aarch64.cc2778 LogicVRegister Simulator::fcmla(VectorFormat vform, in fcmla() function in vixl::aarch64::Simulator
2839 LogicVRegister Simulator::fcmla(VectorFormat vform, in fcmla() function in vixl::aarch64::Simulator
2846 fcmla<SimFloat16>(vform, dst, src1, src2, acc, -1, rot); in fcmla()
2848 fcmla<float>(vform, dst, src1, src2, acc, -1, rot); in fcmla()
2850 fcmla<double>(vform, dst, src1, src2, acc, -1, rot); in fcmla()
2856 LogicVRegister Simulator::fcmla(VectorFormat vform, in fcmla() function in vixl::aarch64::Simulator
2865 fcmla<float>(vform, dst, src1, src2, dst, index, rot); in fcmla()
2867 fcmla<double>(vform, dst, src1, src2, dst, index, rot); in fcmla()
Dsimulator-aarch64.h3306 LogicVRegister fcmla(VectorFormat vform,
3313 LogicVRegister fcmla(VectorFormat vform,
3319 LogicVRegister fcmla(VectorFormat vform,
Dassembler-aarch64.h3571 void fcmla(const VRegister& vd,
3578 void fcmla(const VRegister& vd,
4130 void fcmla(const ZRegister& zda,
4137 void fcmla(const ZRegister& zda,
Dmacro-assembler-aarch64.h3150 fcmla(vd, vn, vm, vm_index, rot); in Fcmla()
3158 fcmla(vd, vn, vm, rot); in Fcmla()
4255 fcmla(zda, pg, zn, zm, rot); in Fcmla()
4264 fcmla(zda, zn, zm, index, rot); in Fcmla()
Dsimulator-aarch64.cc5399 fcmla(vf, rd, rn, rm, rd, rot); in VisitNEON3SameExtra()
5860 fcmla(vf, in VisitNEONByIndexedElement()
8131 fcmla(vform, result, zn, zm, zda, rot); in VisitSVEFPComplexMulAdd()
8169 fcmla(vform, zda, zn, temp, zda, rot); in VisitSVEFPComplexMulAddIndex()
Dassembler-sve-aarch64.cc1292 void Assembler::fcmla(const ZRegister& zda, in fcmla() function in vixl::aarch64::Assembler
1313 void Assembler::fcmla(const ZRegister& zda, in fcmla() function in vixl::aarch64::Assembler
Dassembler-aarch64.cc3922 void Assembler::fcmla(const VRegister& vd, in fcmla() function in vixl::aarch64::Assembler
3939 void Assembler::fcmla(const VRegister& vd, in fcmla() function in vixl::aarch64::Assembler
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12498 "ge\005fcmgt\005fcmla\005fcmle\005fcmlt\005fcmne\004fcmp\005fcmpe\005fcm"
13818 …{ 1132 /* fcmla */, AArch64::FCMLA_ZZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__…
13819 …{ 1132 /* fcmla */, AArch64::FCMLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__…
13820 …{ 1132 /* fcmla */, AArch64::FCMLAv2f64, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
13821 …{ 1132 /* fcmla */, AArch64::FCMLAv4f32, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
13822 …{ 1132 /* fcmla */, AArch64::FCMLAv8f16, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
13823 …{ 1132 /* fcmla */, AArch64::FCMLAv2f32, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector…
13824 …{ 1132 /* fcmla */, AArch64::FCMLAv4f16, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector…
13825 …{ 1132 /* fcmla */, AArch64::FCMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Ti…
13826 …{ 1132 /* fcmla */, AArch64::FCMLA_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Ti…
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td217 defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla", int_aarch64_sve_fcmla>;
234 defm FCMLA_ZZZI : sve_fp_fcmla_by_indexed_elem<"fcmla", int_aarch64_sve_fcmla_lane>;
DAArch64InstrInfo.td794 "fcmla", null_frag>;
797 defm FCMLA : SIMDIndexedTiedComplexHSD<1, 0, 1, complexrotateop, "fcmla",
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td455 defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla", int_aarch64_sve_fcmla>;
488 defm FCMLA_ZZZI : sve_fp_fcmla_by_indexed_elem<"fcmla", int_aarch64_sve_fcmla_lane>;
DAArch64InstrInfo.td908 "fcmla", null_frag>;
911 defm FCMLA : SIMDIndexedTiedComplexHSD<1, 0, 1, complexrotateop, "fcmla",
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md3563 void fcmla(const VRegister& vd,
3574 void fcmla(const VRegister& vd,

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