| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 117 fcvtms h22, h13
118 fcvtms s22, s13
119 fcvtms d21, d14
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| D | arm64-fp-encoding.s | 290 fcvtms w1, h2
291 fcvtms w1, s2
292 fcvtms w1, d2
293 fcvtms x1, h2
294 fcvtms x1, s2
295 fcvtms x1, d2
297 ; FP16: fcvtms w1, h2 ; encoding: [0x41,0x00,0xf0,0x1e]
299 ; NO-FP16-NEXT: fcvtms w1, h2
300 ; CHECK: fcvtms w1, s2 ; encoding: [0x41,0x00,0x30,0x1e]
301 ; CHECK: fcvtms w1, d2 ; encoding: [0x41,0x00,0x70,0x1e]
[all …]
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| D | neon-simd-misc.s | 597 fcvtms v4.4h, v0.4h
598 fcvtms v6.8h, v8.8h
599 fcvtms v6.4s, v8.4s
600 fcvtms v6.2d, v8.2d
601 fcvtms v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 234 fcvtms h22, h13
346 fcvtms v4.4h, v0.4h
348 fcvtms v6.8h, v8.8h
|
| D | arm64-advsimd.s | 814 fcvtms.2s v0, v0
815 fcvtms.4s v0, v0
816 fcvtms.2d v0, v0
817 fcvtms s0, s0
818 fcvtms d0, d0 define
820 ; CHECK: fcvtms.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x0e]
821 ; CHECK: fcvtms.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x4e]
822 ; CHECK: fcvtms.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x4e]
823 ; CHECK: fcvtms s0, s0 ; encoding: [0x00,0xb8,0x21,0x5e]
824 ; CHECK: fcvtms d0, d0 ; encoding: [0x00,0xb8,0x61,0x5e]
|
| D | neon-diagnostics.s | 5911 fcvtms v0.16b, v31.16b
5912 fcvtms v2.8h, v4.8h
5913 fcvtms v1.8b, v9.8b
5914 fcvtms v13.4h, v21.4h
7207 fcvtms s0, d0
7208 fcvtms d0, s0 define
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 117 fcvtms h22, h13
118 fcvtms s22, s13
119 fcvtms d21, d14
|
| D | arm64-fp-encoding.s | 290 fcvtms w1, h2
291 fcvtms w1, s2
292 fcvtms w1, d2
293 fcvtms x1, h2
294 fcvtms x1, s2
295 fcvtms x1, d2
297 ; FP16: fcvtms w1, h2 ; encoding: [0x41,0x00,0xf0,0x1e]
299 ; NO-FP16-NEXT: fcvtms w1, h2
300 ; CHECK: fcvtms w1, s2 ; encoding: [0x41,0x00,0x30,0x1e]
301 ; CHECK: fcvtms w1, d2 ; encoding: [0x41,0x00,0x70,0x1e]
[all …]
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| D | neon-simd-misc.s | 597 fcvtms v4.4h, v0.4h
598 fcvtms v6.8h, v8.8h
599 fcvtms v6.4s, v8.4s
600 fcvtms v6.2d, v8.2d
601 fcvtms v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 234 fcvtms h22, h13
346 fcvtms v4.4h, v0.4h
348 fcvtms v6.8h, v8.8h
|
| D | arm64-advsimd.s | 814 fcvtms.2s v0, v0
815 fcvtms.4s v0, v0
816 fcvtms.2d v0, v0
817 fcvtms s0, s0
818 fcvtms d0, d0 define
820 ; CHECK: fcvtms.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x0e]
821 ; CHECK: fcvtms.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x4e]
822 ; CHECK: fcvtms.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x4e]
823 ; CHECK: fcvtms s0, s0 ; encoding: [0x00,0xb8,0x21,0x5e]
824 ; CHECK: fcvtms d0, d0 ; encoding: [0x00,0xb8,0x61,0x5e]
|
| D | neon-diagnostics.s | 5851 fcvtms v0.16b, v31.16b
5852 fcvtms v2.8h, v4.8h
5853 fcvtms v1.8b, v9.8b
5854 fcvtms v13.4h, v21.4h
6976 fcvtms s0, d0
6977 fcvtms d0, s0 define
|
| D | basic-a64-instructions.s | 2069 fcvtms w2, s3
2070 fcvtms x4, s5
2123 fcvtms w2, d3
2124 fcvtms x4, d5
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 88 ;CHECK: fcvtms w0, s0
90 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %A)
96 ;CHECK: fcvtms x0, s0
98 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f32(float %A)
104 ;CHECK: fcvtms w0, d0
106 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f64(double %A)
112 ;CHECK: fcvtms x0, d0
114 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %A)
118 declare i32 @llvm.aarch64.neon.fcvtms.i32.f32(float) nounwind readnone
119 declare i64 @llvm.aarch64.neon.fcvtms.i64.f32(float) nounwind readnone
[all …]
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| D | fp16_intrinsic_scalar_1op.ll | 13 declare i64 @llvm.aarch64.neon.fcvtms.i64.f16(half)
14 declare i32 @llvm.aarch64.neon.fcvtms.i32.f16(half)
221 ; CHECK: fcvtms w0, h0
224 %fcvt = tail call i32 @llvm.aarch64.neon.fcvtms.i32.f16(half %a)
231 ; CHECK: fcvtms x0, h0
234 %vcvtmh_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtms.i64.f16(half %a)
|
| D | round-conv.ll | 4 ; CHECK: fcvtms w0, s0
14 ; CHECK: fcvtms x0, s0
24 ; CHECK: fcvtms w0, d0
34 ; CHECK: fcvtms x0, d0
|
| D | arm64-vcvt.ll | 94 ;CHECK: fcvtms.2s v0, v0
96 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float> %A)
103 ;CHECK: fcvtms.4s v0, v0
105 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtms.v4i32.v4f32(<4 x float> %A)
112 ;CHECK: fcvtms.2d v0, v0
114 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double> %A)
121 ;CHECK: fcvtms d0, d0
123 %tmp3 = call <1 x i64> @llvm.aarch64.neon.fcvtms.v1i64.v1f64(<1 x double> %A)
127 declare <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
128 declare <4 x i32> @llvm.aarch64.neon.fcvtms.v4i32.v4f32(<4 x float>) nounwind readnone
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 88 ;CHECK: fcvtms w0, s0
90 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %A)
96 ;CHECK: fcvtms x0, s0
98 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f32(float %A)
104 ;CHECK: fcvtms w0, d0
106 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f64(double %A)
112 ;CHECK: fcvtms x0, d0
114 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %A)
118 declare i32 @llvm.aarch64.neon.fcvtms.i32.f32(float) nounwind readnone
119 declare i64 @llvm.aarch64.neon.fcvtms.i64.f32(float) nounwind readnone
[all …]
|
| D | round-conv.ll | 4 ; CHECK: fcvtms w0, s0
14 ; CHECK: fcvtms x0, s0
24 ; CHECK: fcvtms w0, d0
34 ; CHECK: fcvtms x0, d0
|
| D | arm64-vcvt.ll | 68 ;CHECK: fcvtms.2s v0, v0
70 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float> %A)
77 ;CHECK: fcvtms.4s v0, v0
79 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtms.v4i32.v4f32(<4 x float> %A)
86 ;CHECK: fcvtms.2d v0, v0
88 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double> %A)
92 declare <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
93 declare <4 x i32> @llvm.aarch64.neon.fcvtms.v4i32.v4f32(<4 x float>) nounwind readnone
94 declare <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-cvt.s.cs | 19 0xb6,0xb9,0x21,0x5e = fcvtms s22, s13
20 0xd5,0xb9,0x61,0x5e = fcvtms d21, d14
|
| D | neon-simd-misc.s.cs | 177 0x06,0xb9,0x21,0x4e = fcvtms v6.4s, v8.4s
178 0x06,0xb9,0x61,0x4e = fcvtms v6.2d, v8.2d
179 0x04,0xb8,0x21,0x0e = fcvtms v4.2s, v0.2s
|
| D | basic-a64-instructions.s.cs | 813 0x62,0x00,0x30,0x1e = fcvtms w2, s3
814 0xa4,0x00,0x30,0x9e = fcvtms x4, s5
837 0x62,0x00,0x70,0x1e = fcvtms w2, d3
838 0xa4,0x00,0x70,0x9e = fcvtms x4, d5
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-fp-aarch64.cc | 339 COMPARE(fcvtms(w0, s1), "fcvtms w0, s1"); in TEST()
340 COMPARE(fcvtms(x2, s3), "fcvtms x2, s3"); in TEST()
341 COMPARE(fcvtms(w4, d5), "fcvtms w4, d5"); in TEST()
342 COMPARE(fcvtms(x6, d7), "fcvtms x6, d7"); in TEST()
381 COMPARE(fcvtms(w0, h1), "fcvtms w0, h1"); in TEST()
382 COMPARE(fcvtms(x2, h3), "fcvtms x2, h3"); in TEST()
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| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 753 fcvtms w2, h3 label
754 fcvtms x4, h5 label
777 fcvtms w2, s3 label
778 fcvtms x4, s5 label
801 fcvtms w2, d3 label
802 fcvtms x4, d5 label
2025 # CHECK-NEXT: 1 3 0.50 fcvtms w2, h3
2026 # CHECK-NEXT: 1 3 0.50 fcvtms x4, h5
2049 # CHECK-NEXT: 1 3 0.50 fcvtms w2, s3
2050 # CHECK-NEXT: 1 3 0.50 fcvtms x4, s5
[all …]
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