| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 130 fcvtmu h12, h13
131 fcvtmu s12, s13
132 fcvtmu d21, d14
|
| D | arm64-fp-encoding.s | 308 fcvtmu w1, h2
309 fcvtmu w1, s2
310 fcvtmu w1, d2
311 fcvtmu x1, h2
312 fcvtmu x1, s2
313 fcvtmu x1, d2
315 ; FP16: fcvtmu w1, h2 ; encoding: [0x41,0x00,0xf1,0x1e]
317 ; NO-FP16-NEXT: fcvtmu w1, h2
318 ; CHECK: fcvtmu w1, s2 ; encoding: [0x41,0x00,0x31,0x1e]
319 ; CHECK: fcvtmu w1, d2 ; encoding: [0x41,0x00,0x71,0x1e]
[all …]
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| D | neon-simd-misc.s | 609 fcvtmu v4.4h, v0.4h
610 fcvtmu v6.8h, v8.8h
611 fcvtmu v6.4s, v8.4s
612 fcvtmu v6.2d, v8.2d
613 fcvtmu v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 236 fcvtmu h12, h13
350 fcvtmu v4.4h, v0.4h
352 fcvtmu v6.8h, v8.8h
|
| D | arm64-advsimd.s | 826 fcvtmu.2s v0, v0
827 fcvtmu.4s v0, v0
828 fcvtmu.2d v0, v0
829 fcvtmu s0, s0
830 fcvtmu d0, d0 define
832 ; CHECK: fcvtmu.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x2e]
833 ; CHECK: fcvtmu.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x6e]
834 ; CHECK: fcvtmu.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x6e]
835 ; CHECK: fcvtmu s0, s0 ; encoding: [0x00,0xb8,0x21,0x7e]
836 ; CHECK: fcvtmu d0, d0 ; encoding: [0x00,0xb8,0x61,0x7e]
|
| D | neon-diagnostics.s | 5916 fcvtmu v0.16b, v31.16b
5917 fcvtmu v2.8h, v4.8h
5918 fcvtmu v1.8b, v9.8b
5919 fcvtmu v13.4h, v21.4h
7222 fcvtmu s0, d0
7223 fcvtmu d0, s0 define
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 130 fcvtmu h12, h13
131 fcvtmu s12, s13
132 fcvtmu d21, d14
|
| D | arm64-fp-encoding.s | 308 fcvtmu w1, h2
309 fcvtmu w1, s2
310 fcvtmu w1, d2
311 fcvtmu x1, h2
312 fcvtmu x1, s2
313 fcvtmu x1, d2
315 ; FP16: fcvtmu w1, h2 ; encoding: [0x41,0x00,0xf1,0x1e]
317 ; NO-FP16-NEXT: fcvtmu w1, h2
318 ; CHECK: fcvtmu w1, s2 ; encoding: [0x41,0x00,0x31,0x1e]
319 ; CHECK: fcvtmu w1, d2 ; encoding: [0x41,0x00,0x71,0x1e]
[all …]
|
| D | neon-simd-misc.s | 609 fcvtmu v4.4h, v0.4h
610 fcvtmu v6.8h, v8.8h
611 fcvtmu v6.4s, v8.4s
612 fcvtmu v6.2d, v8.2d
613 fcvtmu v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 236 fcvtmu h12, h13
350 fcvtmu v4.4h, v0.4h
352 fcvtmu v6.8h, v8.8h
|
| D | arm64-advsimd.s | 826 fcvtmu.2s v0, v0
827 fcvtmu.4s v0, v0
828 fcvtmu.2d v0, v0
829 fcvtmu s0, s0
830 fcvtmu d0, d0 define
832 ; CHECK: fcvtmu.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x2e]
833 ; CHECK: fcvtmu.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x6e]
834 ; CHECK: fcvtmu.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x6e]
835 ; CHECK: fcvtmu s0, s0 ; encoding: [0x00,0xb8,0x21,0x7e]
836 ; CHECK: fcvtmu d0, d0 ; encoding: [0x00,0xb8,0x61,0x7e]
|
| D | neon-diagnostics.s | 5856 fcvtmu v0.16b, v31.16b
5857 fcvtmu v2.8h, v4.8h
5858 fcvtmu v1.8b, v9.8b
5859 fcvtmu v13.4h, v21.4h
6991 fcvtmu s0, d0
6992 fcvtmu d0, s0 define
|
| D | basic-a64-instructions.s | 2071 fcvtmu w6, s7
2072 fcvtmu x8, s9
2125 fcvtmu w6, d7
2126 fcvtmu x8, d9
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 128 ;CHECK: fcvtmu w0, s0
130 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %A)
136 ;CHECK: fcvtmu x0, s0
138 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float %A)
144 ;CHECK: fcvtmu w0, d0
146 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double %A)
152 ;CHECK: fcvtmu x0, d0
154 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %A)
158 declare i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float) nounwind readnone
159 declare i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float) nounwind readnone
[all …]
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| D | fp16_intrinsic_scalar_1op.ll | 11 declare i64 @llvm.aarch64.neon.fcvtmu.i64.f16(half)
12 declare i32 @llvm.aarch64.neon.fcvtmu.i32.f16(half)
240 ; CHECK: fcvtmu w0, h0
243 %fcvt = tail call i32 @llvm.aarch64.neon.fcvtmu.i32.f16(half %a)
250 ; CHECK: fcvtmu x0, h0
253 %vcvtmh_u64_f16 = tail call i64 @llvm.aarch64.neon.fcvtmu.i64.f16(half %a)
|
| D | round-conv.ll | 44 ; CHECK: fcvtmu w0, s0
54 ; CHECK: fcvtmu x0, s0
64 ; CHECK: fcvtmu w0, d0
74 ; CHECK: fcvtmu x0, d0
|
| D | arm64-vcvt.ll | 135 ;CHECK: fcvtmu.2s v0, v0
137 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
144 ;CHECK: fcvtmu.4s v0, v0
146 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float> %A)
153 ;CHECK: fcvtmu.2d v0, v0
155 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double> %A)
162 ;CHECK: fcvtmu d0, d0
164 %tmp3 = call <1 x i64> @llvm.aarch64.neon.fcvtmu.v1i64.v1f64(<1 x double> %A)
168 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
169 declare <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float>) nounwind readnone
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 128 ;CHECK: fcvtmu w0, s0
130 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %A)
136 ;CHECK: fcvtmu x0, s0
138 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float %A)
144 ;CHECK: fcvtmu w0, d0
146 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double %A)
152 ;CHECK: fcvtmu x0, d0
154 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %A)
158 declare i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float) nounwind readnone
159 declare i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float) nounwind readnone
[all …]
|
| D | round-conv.ll | 44 ; CHECK: fcvtmu w0, s0
54 ; CHECK: fcvtmu x0, s0
64 ; CHECK: fcvtmu w0, d0
74 ; CHECK: fcvtmu x0, d0
|
| D | arm64-vcvt.ll | 99 ;CHECK: fcvtmu.2s v0, v0
101 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
108 ;CHECK: fcvtmu.4s v0, v0
110 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float> %A)
117 ;CHECK: fcvtmu.2d v0, v0
119 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double> %A)
123 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
124 declare <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float>) nounwind readnone
125 declare <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-cvt.s.cs | 21 0xac,0xb9,0x21,0x7e = fcvtmu s12, s13
22 0xd5,0xb9,0x61,0x7e = fcvtmu d21, d14
|
| D | neon-simd-misc.s.cs | 180 0x06,0xb9,0x21,0x6e = fcvtmu v6.4s, v8.4s
181 0x06,0xb9,0x61,0x6e = fcvtmu v6.2d, v8.2d
182 0x04,0xb8,0x21,0x2e = fcvtmu v4.2s, v0.2s
|
| D | basic-a64-instructions.s.cs | 815 0xe6,0x00,0x31,0x1e = fcvtmu w6, s7
816 0x28,0x01,0x31,0x9e = fcvtmu x8, s9
839 0xe6,0x00,0x71,0x1e = fcvtmu w6, d7
840 0x28,0x01,0x71,0x9e = fcvtmu x8, d9
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-fp-aarch64.cc | 343 COMPARE(fcvtmu(w8, s9), "fcvtmu w8, s9"); in TEST()
344 COMPARE(fcvtmu(x10, s11), "fcvtmu x10, s11"); in TEST()
345 COMPARE(fcvtmu(w12, d13), "fcvtmu w12, d13"); in TEST()
346 COMPARE(fcvtmu(x14, d15), "fcvtmu x14, d15"); in TEST()
383 COMPARE(fcvtmu(w8, h9), "fcvtmu w8, h9"); in TEST()
384 COMPARE(fcvtmu(x10, h11), "fcvtmu x10, h11"); in TEST()
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| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 755 fcvtmu w6, h7 label
756 fcvtmu x8, h9 label
779 fcvtmu w6, s7 label
780 fcvtmu x8, s9 label
803 fcvtmu w6, d7 label
804 fcvtmu x8, d9 label
2027 # CHECK-NEXT: 1 3 0.50 fcvtmu w6, h7
2028 # CHECK-NEXT: 1 3 0.50 fcvtmu x8, h9
2051 # CHECK-NEXT: 1 3 0.50 fcvtmu w6, s7
2052 # CHECK-NEXT: 1 3 0.50 fcvtmu x8, s9
[all …]
|