/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | flat-offset-bug.ll | 41 ; GFX9: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}] offset:8{{$}} 42 ; GFX10: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}} 65 ; GFX9: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}] offset:8{{$}} 66 ; GFX10: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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D | build-vector-insert-elt-infloop.ll | 7 ; GCN: flat_load_short_d16_hi
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D | chain-hi-to-lo.ll | 188 ; GCN-NEXT: flat_load_short_d16_hi v0, v[1:2] 209 ; GCN-NEXT: flat_load_short_d16_hi v0, v[2:3] 420 ; GCN-NEXT: flat_load_short_d16_hi v0, v[0:1]
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D | load-hi16.ll | 365 ; GFX900-NEXT: flat_load_short_d16_hi v2, v[0:1] 386 ; GFX900-NEXT: flat_load_short_d16_hi v2, v[0:1] 963 ; GFX900-NEXT: flat_load_short_d16_hi v2
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | flat-gfx9.s | 140 flat_load_short_d16_hi v1, v[3:4] label
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D | flat-gfx10.s | 112 flat_load_short_d16_hi v1, v[3:4] label
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D | gfx8_unsupported.s | 124 flat_load_short_d16_hi v1, v[3:4] label
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D | gfx7_unsupported.s | 130 flat_load_short_d16_hi v1, v[3:4] label
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D | gfx9_asm_all.s | 3899 flat_load_short_d16_hi v5, v[1:2] offset:4095 label 3902 flat_load_short_d16_hi v255, v[1:2] offset:4095 label 3905 flat_load_short_d16_hi v5, v[254:255] offset:4095 label 3908 flat_load_short_d16_hi v5, v[1:2] label 3911 flat_load_short_d16_hi v5, v[1:2] offset:0 label 3914 flat_load_short_d16_hi v5, v[1:2] offset:7 label 3917 flat_load_short_d16_hi v5, v[1:2] offset:4095 glc label 3920 flat_load_short_d16_hi v5, v[1:2] offset:4095 slc label
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/external/mesa3d/src/amd/compiler/ |
D | aco_validate.cpp | 632 case aco_opcode::flat_load_short_d16_hi: in validate_subdword_definition() 671 case aco_opcode::flat_load_short_d16_hi: in get_subdword_bytes_written()
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D | aco_register_allocation.cpp | 517 instr->opcode = aco_opcode::flat_load_short_d16_hi; in add_subdword_definition()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | FLATInstructions.td | 401 def FLAT_LOAD_SHORT_D16_HI : FLAT_Load_Pseudo <"flat_load_short_d16_hi", VGPR_32, 1>;
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | FLATInstructions.td | 481 def FLAT_LOAD_SHORT_D16_HI : FLAT_Load_Pseudo <"flat_load_short_d16_hi", VGPR_32, 1>;
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX9.rst | 246 …flat_load_short_d16_hi :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vaddr<amdgpu_syn…
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D | AMDGPUAsmGFX10.rst | 464 …flat_load_short_d16_hi :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`vaddr<amdgpu_sy…
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | gfx9_dasm_all.txt | 3348 # CHECK: flat_load_short_d16_hi v5, v[1:2] offset:4095 ; encoding: [0xff,0x0f,0x94,0xdc,0x01,0x00,0… 3351 # CHECK: flat_load_short_d16_hi v255, v[1:2] offset:4095 ; encoding: [0xff,0x0f,0x94,0xdc,0x01,0x00… 3354 # CHECK: flat_load_short_d16_hi v5, v[254:255] offset:4095 ; encoding: [0xff,0x0f,0x94,0xdc,0xfe,0x… 3357 # CHECK: flat_load_short_d16_hi v5, v[1:2] ; encoding: [0x00,0x00,0x94,0xdc,0x01,0x00,0x00,0x… 3360 # CHECK: flat_load_short_d16_hi v5, v[1:2] offset:7 ; encoding: [0x07,0x00,0x94,0xdc,0x01,0x00,0x00… 3363 # CHECK: flat_load_short_d16_hi v5, v[1:2] offset:4095 glc ; encoding: [0xff,0x0f,0x95,0xdc,0x01,0x… 3366 # CHECK: flat_load_short_d16_hi v5, v[1:2] offset:4095 slc ; encoding: [0xff,0x0f,0x96,0xdc,0x01,0x…
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D | gfx10_dasm_all.txt | 8030 # GFX10: flat_load_short_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x94,0xdc,0x03,0x00,0x7d,0x…
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