Searched refs:fmask_state (Results 1 – 4 of 4) sorted by relevance
823 uint32_t *fmask_state) in gfx10_make_texture_descriptor() argument884 if (fmask_state) { in gfx10_make_texture_descriptor()908 fmask_state[0] = (va >> 8) | image->planes[0].surface.fmask_tile_swizzle; in gfx10_make_texture_descriptor()909 fmask_state[1] = S_00A004_BASE_ADDRESS_HI(va >> 40) | in gfx10_make_texture_descriptor()912 fmask_state[2] = S_00A008_WIDTH_HI((width - 1) >> 2) | in gfx10_make_texture_descriptor()915 fmask_state[3] = S_00A00C_DST_SEL_X(V_008F1C_SQ_SEL_X) | in gfx10_make_texture_descriptor()921 fmask_state[4] = S_00A010_DEPTH(last_layer) | in gfx10_make_texture_descriptor()923 fmask_state[5] = 0; in gfx10_make_texture_descriptor()924 fmask_state[6] = S_00A018_META_PIPE_ALIGNED(1); in gfx10_make_texture_descriptor()925 fmask_state[7] = 0; in gfx10_make_texture_descriptor()[all …]
3644 unsigned depth, uint32_t *state, uint32_t *fmask_state) in gfx10_make_texture_descriptor() argument3791 fmask_state[0] = (va >> 8) | tex->surface.fmask_tile_swizzle; in gfx10_make_texture_descriptor()3792 fmask_state[1] = S_00A004_BASE_ADDRESS_HI(va >> 40) | S_00A004_FORMAT(format) | in gfx10_make_texture_descriptor()3794 fmask_state[2] = S_00A008_WIDTH_HI((width - 1) >> 2) | S_00A008_HEIGHT(height - 1) | in gfx10_make_texture_descriptor()3796 fmask_state[3] = in gfx10_make_texture_descriptor()3801 fmask_state[4] = S_00A010_DEPTH(last_layer) | S_00A010_BASE_ARRAY(first_layer); in gfx10_make_texture_descriptor()3802 fmask_state[5] = 0; in gfx10_make_texture_descriptor()3803 fmask_state[6] = S_00A018_META_PIPE_ALIGNED(1); in gfx10_make_texture_descriptor()3804 fmask_state[7] = 0; in gfx10_make_texture_descriptor()3817 unsigned depth, uint32_t *state, uint32_t *fmask_state) in si_make_texture_descriptor() argument[all …]
505 uint32_t *fmask_state);654 uint32_t fmask_state[8]; member
475 memcpy(desc + 8, sview->fmask_state, 8 * 4); in si_set_sampler_view_desc()