/external/llvm-project/llvm/test/MC/AArch64/SVE/ |
D | fmsb.s | 10 fmsb z0.h, p7/m, z1.h, z31.h label 16 fmsb z0.s, p7/m, z1.s, z31.s label 22 fmsb z0.d, p7/m, z1.d, z31.d label 38 fmsb z0.d, p7/m, z1.d, z31.d label 50 fmsb z0.d, p7/m, z1.d, z31.d label
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D | fmsb-diagnostics.s | 7 fmsb z0.h, p8/m, z1.h, z2.h label 16 fmsb z0.s, p7/m, z1.h, z2.h label 21 fmsb z0.b, p7/m, z1.b, z2.b label 30 fmsb z0.h, p7/m, z1.h, z2.h[0] label
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | sve-intrinsics-fp-arith.ll | 637 ; CHECK: fmsb z0.h, p0/m, z1.h, z2.h 639 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmsb.nxv8f16(<vscale x 8 x i1> %pg, 648 ; CHECK: fmsb z0.s, p0/m, z1.s, z2.s 650 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmsb.nxv4f32(<vscale x 4 x i1> %pg, 659 ; CHECK: fmsb z0.d, p0/m, z1.d, z2.d 661 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmsb.nxv2f64(<vscale x 2 x i1> %pg, 1583 declare <vscale x 8 x half> @llvm.aarch64.sve.fmsb.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, … 1584 declare <vscale x 4 x float> @llvm.aarch64.sve.fmsb.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>… 1585 declare <vscale x 2 x double> @llvm.aarch64.sve.fmsb.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x doubl…
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/external/vixl/test/aarch64/ |
D | test-api-movprfx-aarch64.cc | 453 __ fmsb(z15.VnD(), p1.Merging(), z15.VnD(), z31.VnD()); in TEST() local 456 __ fmsb(z21.VnD(), p0.Merging(), z19.VnD(), z21.VnD()); in TEST() local 936 __ fmsb(z21.VnH(), p1.Merging(), z30.VnH(), z28.VnH()); in TEST() local 1755 __ fmsb(z23.VnS(), p4.Merging(), z1.VnS(), z7.VnS()); in TEST() local
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D | test-disasm-sve-aarch64.cc | 1466 COMPARE_PREFIX(fmsb(z3.VnH(), p4.Merging(), z8.VnH(), z22.VnH()), in TEST() 1468 COMPARE_PREFIX(fmsb(z3.VnS(), p4.Merging(), z8.VnS(), z22.VnS()), in TEST() 1470 COMPARE_PREFIX(fmsb(z3.VnD(), p4.Merging(), z8.VnD(), z22.VnD()), in TEST()
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/external/vixl/src/aarch64/ |
D | macro-assembler-sve-aarch64.cc | 1863 &Assembler::fmsb, in Fmls()
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D | assembler-aarch64.h | 4319 void fmsb(const ZRegister& zdn,
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D | assembler-sve-aarch64.cc | 1467 void Assembler::fmsb(const ZRegister& zdn, in fmsb() function in vixl::aarch64::Assembler
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D | macro-assembler-aarch64.h | 4516 fmsb(zdn, pg, zm, za); in Fmsb()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 225 defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb", int_aarch64_sve_fmsb>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12506 "\006fmlslt\004fmov\004fmsb\005fmsub\004fmul\005fmulx\004fneg\005fnmad\006" 14389 …{ 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0… 14390 …{ 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Tie0… 14391 …{ 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0… 21762 …{ 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0… 21763 …{ 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Tie0… 21764 …{ 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0… 30513 { 1524 /* fmsb */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE }, 30514 { 1524 /* fmsb */, 49 /* 0, 4, 5 */, MCK_SVEVectorHReg, AMFBS_HasSVE }, 30515 { 1524 /* fmsb */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE }, [all …]
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 463 defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb", int_aarch64_sve_fmsb>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
D | IntrinsicImpl.inc | 631 "llvm.aarch64.sve.fmsb", 10764 1, // llvm.aarch64.sve.fmsb
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