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Searched refs:fnmla (Results 1 – 12 of 12) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dfnmla.s10 fnmla z0.h, p7/m, z1.h, z31.h label
16 fnmla z0.s, p7/m, z1.s, z31.s label
22 fnmla z0.d, p7/m, z1.d, z31.d label
38 fnmla z0.d, p7/m, z1.d, z31.d label
50 fnmla z0.d, p7/m, z1.d, z31.d label
Dfnmla-diagnostics.s7 fnmla z0.h, p8/m, z1.h, z2.h label
16 fnmla z0.s, p7/m, z1.h, z2.h label
25 fnmla z0.h, p7/m, z1.h, z2.h[0] label
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-fp-arith.ll847 ; CHECK: fnmla z0.h, p0/m, z1.h, z2.h
849 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmla.nxv8f16(<vscale x 8 x i1> %pg,
858 ; CHECK: fnmla z0.s, p0/m, z1.s, z2.s
860 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmla.nxv4f32(<vscale x 4 x i1> %pg,
869 ; CHECK: fnmla z0.d, p0/m, z1.d, z2.d
871 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmla.nxv2f64(<vscale x 2 x i1> %pg,
1607 declare <vscale x 8 x half> @llvm.aarch64.sve.fnmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>,…
1608 declare <vscale x 4 x float> @llvm.aarch64.sve.fnmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float…
1609 declare <vscale x 2 x double> @llvm.aarch64.sve.fnmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x doub…
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc474 __ fnmla(z13.VnH(), p6.Merging(), z13.VnH(), z26.VnH()); in TEST() local
477 __ fnmla(z19.VnH(), p7.Merging(), z25.VnH(), z19.VnH()); in TEST() local
954 __ fnmla(z15.VnH(), p1.Merging(), z26.VnH(), z18.VnH()); in TEST() local
1773 __ fnmla(z5.VnS(), p0.Merging(), z17.VnS(), z29.VnS()); in TEST() local
Dtest-disasm-sve-aarch64.cc1478 COMPARE_PREFIX(fnmla(z31.VnH(), p6.Merging(), z14.VnH(), z8.VnH()), in TEST()
1480 COMPARE_PREFIX(fnmla(z31.VnS(), p6.Merging(), z14.VnS(), z8.VnS()), in TEST()
1482 COMPARE_PREFIX(fnmla(z31.VnD(), p6.Merging(), z14.VnD(), z8.VnD()), in TEST()
/external/vixl/src/aarch64/
Dmacro-assembler-sve-aarch64.cc1888 &Assembler::fnmla, in Fnmla()
Dassembler-aarch64.h4363 void fnmla(const ZRegister& zda,
Dassembler-sve-aarch64.cc1497 void Assembler::fnmla(const ZRegister& zda, in fnmla() function in vixl::aarch64::Assembler
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td221 defm FNMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b10, "fnmla", int_aarch64_sve_fnmla>;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12507 "fnmadd\005fnmla\005fnmls\005fnmsb\006fnmsub\005fnmul\006frecpe\006frecp"
14459 …{ 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Ti…
14460 …{ 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Ti…
14461 …{ 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Ti…
21832 …{ 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Ti…
21833 …{ 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Ti…
21834 …{ 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Ti…
30609 { 1564 /* fnmla */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
30610 { 1564 /* fnmla */, 49 /* 0, 4, 5 */, MCK_SVEVectorHReg, AMFBS_HasSVE },
30611 { 1564 /* fnmla */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
[all …]
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td459 defm FNMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b10, "fnmla", int_aarch64_sve_fnmla>;
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc637 "llvm.aarch64.sve.fnmla",
10770 1, // llvm.aarch64.sve.fnmla