| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | fp-dp3.ll | 42 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
43 ; CHECK-NOFAST: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
82 ; CHECK: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
83 ; CHECK-NOFAST: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
131 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
132 ; CHECK-NOFAST-NOT: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
|
| D | fp16_intrinsic_scalar_3op.ll | 42 ; CHECK: fnmsub h0, h0, h1, h2
84 ; CHECK: fnmsub h0, h0, h1, h2
|
| D | arm64-fmadd.ll | 41 ; CHECK: fnmsub s0, s0, s1, s2
84 ; CHECK: fnmsub d0, d0, d1, d2
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | fp-dp3.ll | 42 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
43 ; CHECK-NOFAST: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
82 ; CHECK: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
83 ; CHECK-NOFAST: fnmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
131 ; CHECK: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
132 ; CHECK-NOFAST-NOT: fnmsub {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
|
| D | arm64-fmadd.ll | 41 ; CHECK: fnmsub s0, s0, s1, s2
84 ; CHECK: fnmsub d0, d0, d1, d2
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding-fp.s.cs | 71 0xfc,0x43,0x29,0x3c = fnmsub 2, 3, 4, 5
72 0xfc,0x43,0x29,0x3d = fnmsub. 2, 3, 4, 5
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | fma-assoc.ll | 69 ; CHECK: fnmsub
70 ; CHECK-NEXT: fnmsub
206 ; CHECK: fnmsub
207 ; CHECK-NEXT: fnmsub
226 ; CHECK: fnmsub
227 ; CHECK-NEXT: fnmsub
|
| D | recipest.ll | 18 ; CHECK-DAG: fnmsub
70 ; CHECK-DAG: fnmsub
161 ; CHECK-DAG: fnmsub
163 ; CHECK-NEXT: fnmsub
208 ; CHECK-DAG: fnmsub
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 230 # CHECK-BE: fnmsub 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3c]
231 # CHECK-LE: fnmsub 2, 3, 4, 5 # encoding: [0x3c,0x29,0x43,0xfc]
232 fnmsub 2, 3, 4, 5
233 # CHECK-BE: fnmsub. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3d]
234 # CHECK-LE: fnmsub. 2, 3, 4, 5 # encoding: [0x3d,0x29,0x43,0xfc]
235 fnmsub. 2, 3, 4, 5
|
| /external/llvm-project/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 236 # CHECK-BE: fnmsub 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3c]
237 # CHECK-LE: fnmsub 2, 3, 4, 5 # encoding: [0x3c,0x29,0x43,0xfc]
238 fnmsub 2, 3, 4, 5
239 # CHECK-BE: fnmsub. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3d]
240 # CHECK-LE: fnmsub. 2, 3, 4, 5 # encoding: [0x3d,0x29,0x43,0xfc]
241 fnmsub. 2, 3, 4, 5
|
| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | rvd-aliases-valid.s | 63 # CHECK-INST: fnmsub.d fs2, fs3, fs4, fs5, dyn
64 # CHECK-ALIAS: fnmsub.d fs2, fs3, fs4, fs5{{[[:space:]]}}
65 fnmsub.d f18, f19, f20, f21
|
| D | rv32d-valid.s | 55 # CHECK-ASM-AND-OBJ: fnmsub.d fs2, fs3, fs4, fs5, dyn
57 fnmsub.d f18, f19, f20, f21, dyn
130 # CHECK-ASM-AND-OBJ: fnmsub.d fs2, fs3, fs4, fs5, rdn
132 fnmsub.d f18, f19, f20, f21, rdn
|
| D | rvzfh-aliases-valid.s | 67 # CHECK-INST: fnmsub.h fs2, fs3, fs4, fs5, dyn
68 # CHECK-ALIAS: fnmsub.h fs2, fs3, fs4, fs5{{[[:space:]]}}
69 fnmsub.h f18, f19, f20, f21
|
| D | rv32f-valid.s | 50 # CHECK-ASM-AND-OBJ: fnmsub.s fs2, fs3, fs4, fs5, dyn
52 fnmsub.s f18, f19, f20, f21, dyn
126 # CHECK-ASM-AND-OBJ: fnmsub.s fs2, fs3, fs4, fs5, rdn
128 fnmsub.s f18, f19, f20, f21, rdn
|
| D | rv32zfh-valid.s | 50 # CHECK-ASM-AND-OBJ: fnmsub.h fs2, fs3, fs4, fs5, dyn
52 fnmsub.h f18, f19, f20, f21, dyn
126 # CHECK-ASM-AND-OBJ: fnmsub.h fs2, fs3, fs4, fs5, rdn
128 fnmsub.h f18, f19, f20, f21, rdn
|
| D | rvf-aliases-valid.s | 126 # CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, dyn
127 # CHECK-ALIAS: fnmsub.s fs2, fs3, fs4, fs5{{[[:space:]]}}
128 fnmsub.s f18, f19, f20, f21
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | fma-negate.ll | 179 ; NO-VSX-NEXT: fnmsub 1, 2, 3, 1
217 ; NO-VSX-NEXT: fnmsub 1, 1, 2, 3
287 ; NO-VSX-NEXT: fnmsub 1, 1, 3, 5
288 ; NO-VSX-NEXT: fnmsub 2, 2, 4, 6
|
| D | fma-ext.ll | 62 ; need nsz flag to generate fnmsub since it may affect sign of zero
69 ; CHECK: fnmsub
|
| D | fma-assoc.ll | 364 ; CHECK-NEXT: fnmsub 0, 3, 4, 5
365 ; CHECK-NEXT: fnmsub 1, 1, 2, 0
536 ; fnmsub/xsnmsubadp may affect the sign of zero, we need nsz flag
541 ; CHECK-NEXT: fnmsub 0, 1, 2, 5
542 ; CHECK-NEXT: fnmsub 1, 3, 4, 0
588 ; CHECK-NEXT: fnmsub 0, 3, 4, 5
589 ; CHECK-NEXT: fnmsub 1, 1, 2, 0
|
| D | fma.ll | 107 ; need nsz flag to generate fnmsub since it may affect sign of zero
113 ; CHECK: fnmsub
126 ; CHECK: fnmsub
|
| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | half-arith.ll | 334 ; RV32IZFH-NEXT: fnmsub.h fa0, ft0, fa1, fa2
341 ; RV64IZFH-NEXT: fnmsub.h fa0, ft0, fa1, fa2
354 ; RV32IZFH-NEXT: fnmsub.h fa0, ft0, fa0, fa2
361 ; RV64IZFH-NEXT: fnmsub.h fa0, ft0, fa0, fa2
437 ; RV32IZFH-NEXT: fnmsub.h fa0, ft1, ft0, fa2
445 ; RV64IZFH-NEXT: fnmsub.h fa0, ft1, ft0, fa2
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-fp-encoding.s | 126 fnmsub h1, h2, h3, h4
127 fnmsub s1, s2, s3, s4
128 fnmsub d1, d2, d3, d4 define
130 ; FP16: fnmsub h1, h2, h3, h4 ; encoding: [0x41,0x90,0xe3,0x1f]
132 ; NO-FP16-NEXT: fnmsub h1, h2, h3, h4
133 ; CHECK: fnmsub s1, s2, s3, s4 ; encoding: [0x41,0x90,0x23,0x1f]
134 ; CHECK: fnmsub d1, d2, d3, d4 ; encoding: [0x41,0x90,0x63,0x1f]
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-fp-encoding.s | 126 fnmsub h1, h2, h3, h4
127 fnmsub s1, s2, s3, s4
128 fnmsub d1, d2, d3, d4 define
130 ; FP16: fnmsub h1, h2, h3, h4 ; encoding: [0x41,0x90,0xe3,0x1f]
132 ; NO-FP16-NEXT: fnmsub h1, h2, h3, h4
133 ; CHECK: fnmsub s1, s2, s3, s4 ; encoding: [0x41,0x90,0x23,0x1f]
134 ; CHECK: fnmsub d1, d2, d3, d4 ; encoding: [0x41,0x90,0x63,0x1f]
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-scalar-fp.txt | 104 # FP16: fnmsub h1, h2, h3, h4
105 # CHECK: fnmsub s1, s2, s3, s4
106 # CHECK: fnmsub d1, d2, d3, d4
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-scalar-fp.txt | 104 # FP16: fnmsub h1, h2, h3, h4
105 # CHECK: fnmsub s1, s2, s3, s4
106 # CHECK: fnmsub d1, d2, d3, d4
|