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Searched refs:fp_round (Results 1 – 12 of 12) sorted by relevance

/external/fastrpc/src/
Dstd_dtoa.h121 double fp_round( double dNumber, int nPrecision );
Dstd_dtoa.c131 double fp_round( double dNumber, int nPrecision ) in fp_round() function
Dstd_strlprintf.c45 #define ROUND(d, p) fp_round( d, p )
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.s.setreg.ll11 ; Offset: fp_round = 0, fp_denorm = 4, dx10_clamp = 8, ieee_mode = 9
14 ; Set FP32 fp_round to round to zero
41 ; Set FP64/FP16 fp_round to round to zero
68 ; Set all fp_round to round to zero
95 ; Set FP32 fp_round to dynamic mode
Dfneg-combines.ll1584 ; fp_round tests
/external/mesa3d/src/amd/compiler/
Daco_ir.h184 enum fp_round { enum
204 fp_round round32:2;
205 fp_round round16_64:2;
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dllvm.amdgcn.s.setreg.ll11 ; Offset: fp_round = 0, fp_denorm = 4, dx10_clamp = 8, ieee_mode = 9
14 ; Set FP32 fp_round to round to zero
41 ; Set FP64/FP16 fp_round to round to zero
68 ; Set all fp_round to round to zero
95 ; Set FP32 fp_round to dynamic mode
/external/llvm/test/CodeGen/X86/
Dhalf.ll273 ; fp_round and the subsequent fptrunc from float to half.
/external/llvm-project/llvm/test/CodeGen/X86/
Dcombine-fcopysign.ll243 ; copysign(x, fp_round(y)) -> copysign(x, y)
Dhalf.ll813 ; fp_round and the subsequent fptrunc from float to half.
/external/llvm/test/CodeGen/AArch64/
Df16-instructions.ll761 ; away the (fpext (fp_round <result>)) here.
/external/llvm-project/llvm/test/CodeGen/AArch64/
Df16-instructions.ll1149 ; away the (fpext (fp_round <result>)) here.