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/external/llvm/test/MC/ARM/
Ddirective-fpu-multiple.s1 @ Check multiple .fpu directives.
3 @ The later .fpu directive should overwrite the earlier one.
4 @ We also check here that all the .fpu directives that we expect to work do work
9 .fpu none
10 .fpu vfp
11 .fpu vfpv2
12 .fpu vfpv3
13 .fpu vfpv3-fp16
14 .fpu vfpv3-d16
15 .fpu vfpv3-d16-fp16
[all …]
Dpr22395.s8 .fpu neon
14 .fpu vfpv3
19 .fpu vfpv3-d16
24 .fpu vfpv4
29 .fpu vfpv4-d16
34 .fpu fpv5-d16
39 .fpu fp-armv8
44 .fpu fp-armv8
49 .fpu neon
54 .fpu neon-vfpv4
[all …]
Dpr22395-2.s8 .fpu vfpv3
13 .fpu vfpv4
18 .fpu neon
23 .fpu neon-vfpv4
28 .fpu neon-fp-armv8
33 .fpu crypto-neon-fp-armv8
/external/llvm-project/llvm/test/MC/ARM/
Ddirective-fpu-multiple.s1 @ Check multiple .fpu directives.
3 @ The later .fpu directive should overwrite the earlier one.
4 @ We also check here that all the .fpu directives that we expect to work do work
10 .fpu none
11 .fpu vfp
12 .fpu vfpv2
13 .fpu vfpv3
14 .fpu vfpv3-fp16
15 .fpu vfpv3-d16
16 .fpu vfpv3-d16-fp16
[all …]
Dpr22395.s8 .fpu neon
14 .fpu vfpv3
19 .fpu vfpv3-d16
24 .fpu vfpv4
29 .fpu vfpv4-d16
34 .fpu fpv5-d16
39 .fpu fp-armv8
44 .fpu fp-armv8
49 .fpu neon
54 .fpu neon-vfpv4
[all …]
Dpr22395-2.s8 .fpu vfpv3
13 .fpu vfpv4
18 .fpu neon
23 .fpu neon-vfpv4
28 .fpu neon-fp-armv8
33 .fpu crypto-neon-fp-armv8
/external/llvm-project/lldb/tools/debugserver/source/MacOSX/i386/
DDNBArchImplI386.cpp390 m_state.context.fpu.no_avx.__fpu_reserved[0] = -1; in GetFPUState()
391 m_state.context.fpu.no_avx.__fpu_reserved[1] = -1; in GetFPUState()
392 *(uint16_t *)&(m_state.context.fpu.no_avx.__fpu_fcw) = 0x1234; in GetFPUState()
393 *(uint16_t *)&(m_state.context.fpu.no_avx.__fpu_fsw) = 0x5678; in GetFPUState()
394 m_state.context.fpu.no_avx.__fpu_ftw = 1; in GetFPUState()
395 m_state.context.fpu.no_avx.__fpu_rsrv1 = UINT8_MAX; in GetFPUState()
396 m_state.context.fpu.no_avx.__fpu_fop = 2; in GetFPUState()
397 m_state.context.fpu.no_avx.__fpu_ip = 3; in GetFPUState()
398 m_state.context.fpu.no_avx.__fpu_cs = 4; in GetFPUState()
399 m_state.context.fpu.no_avx.__fpu_rsrv2 = 5; in GetFPUState()
[all …]
/external/llvm-project/lldb/tools/debugserver/source/MacOSX/x86_64/
DDNBArchImplX86_64.cpp272 m_state.context.fpu.no_avx.__fpu_reserved[0] = -1; in GetFPUState()
273 m_state.context.fpu.no_avx.__fpu_reserved[1] = -1; in GetFPUState()
274 *(uint16_t *)&(m_state.context.fpu.no_avx.__fpu_fcw) = 0x1234; in GetFPUState()
275 *(uint16_t *)&(m_state.context.fpu.no_avx.__fpu_fsw) = 0x5678; in GetFPUState()
276 m_state.context.fpu.no_avx.__fpu_ftw = 1; in GetFPUState()
277 m_state.context.fpu.no_avx.__fpu_rsrv1 = UINT8_MAX; in GetFPUState()
278 m_state.context.fpu.no_avx.__fpu_fop = 2; in GetFPUState()
279 m_state.context.fpu.no_avx.__fpu_ip = 3; in GetFPUState()
280 m_state.context.fpu.no_avx.__fpu_cs = 4; in GetFPUState()
281 m_state.context.fpu.no_avx.__fpu_rsrv2 = 5; in GetFPUState()
[all …]
/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterContextDarwin_i386.cpp399 : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() { in RegisterContextDarwin_i386()
513 SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu)); in ReadFPU()
543 SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu)); in WriteFPU()
622 value = fpu.fcw; in ReadRegister()
626 value = fpu.fsw; in ReadRegister()
630 value = fpu.ftw; in ReadRegister()
634 value = fpu.fop; in ReadRegister()
638 value = fpu.ip; in ReadRegister()
642 value = fpu.cs; in ReadRegister()
646 value = fpu.dp; in ReadRegister()
[all …]
DRegisterContextDarwin_x86_64.cpp461 : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() { in RegisterContextDarwin_x86_64()
562 SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu)); in ReadFPU()
592 SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu)); in WriteFPU()
673 value = fpu.fcw; in ReadRegister()
677 value = fpu.fsw; in ReadRegister()
681 value = fpu.ftw; in ReadRegister()
685 value = fpu.fop; in ReadRegister()
689 value = fpu.ip; in ReadRegister()
693 value = fpu.cs; in ReadRegister()
697 value = fpu.dp; in ReadRegister()
[all …]
DRegisterContextMach_i386.cpp29 int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() argument
31 return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count); in DoReadFPU()
47 const FPU &fpu) { in DoWriteFPU() argument
49 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_x86_64.cpp31 FPU &fpu) { in DoReadFPU() argument
33 return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count); in DoReadFPU()
50 const FPU &fpu) { in DoWriteFPU() argument
52 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_arm.cpp31 int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() argument
33 return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count); in DoReadFPU()
54 const FPU &fpu) { in DoWriteFPU() argument
56 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextDarwin_arm64.cpp98 : RegisterContext(thread, concrete_frame_idx), gpr(), fpu(), exc() { in RegisterContextDarwin_arm64()
183 SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu)); in ReadFPU()
221 SetError(set, Write, DoWriteFPU(GetThreadID(), set, fpu)); in WriteFPU()
425 value.SetBytes(fpu.v[reg - fpu_v0].bytes, reg_info->byte_size, in ReadRegister()
463 DataExtractor regdata(&fpu.v[reg - fpu_s0], 4, process_sp->GetByteOrder(), in ReadRegister()
504 DataExtractor regdata(&fpu.v[reg - fpu_d0], 8, process_sp->GetByteOrder(), in ReadRegister()
512 value.SetUInt32(fpu.fpsr); in ReadRegister()
516 value.SetUInt32(fpu.fpcr); in ReadRegister()
617 ::memcpy(fpu.v[reg - fpu_v0].bytes, value.GetBytes(), in WriteRegister()
622 fpu.fpsr = value.GetAsUInt32(); in WriteRegister()
[all …]
/external/cpuinfo/test/cpuinfo/
Dleagoo-t5c.log16 fpu : yes
20 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr s…
43 fpu : yes
47 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr s…
70 fpu : yes
74 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr s…
97 fpu : yes
101 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr s…
124 fpu : yes
128 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr s…
[all …]
Dzenfone-2e.log19 fpu : yes
23 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
48 fpu : yes
52 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
77 fpu : yes
81 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
106 fpu : yes
110 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
Dzenfone-c.log19 fpu : yes
23 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
48 fpu : yes
52 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
77 fpu : yes
81 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
106 fpu : yes
110 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush dts acpi mmx fxs…
Dalldocube-iwork8.log16 fpu : yes
20 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
42 fpu : yes
46 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
68 fpu : yes
72 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
94 fpu : yes
98 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
Dzenfone-2.log16 fpu : yes
20 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
42 fpu : yes
46 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
68 fpu : yes
72 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
94 fpu : yes
98 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
Dmemo-pad-7.log19 fpu : yes
23 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
48 fpu : yes
52 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
77 fpu : yes
81 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
106 fpu : yes
110 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi m…
/external/llvm-project/lldb/source/Plugins/Process/MacOSX-Kernel/
DRegisterContextKDP_x86_64.cpp40 FPU &fpu) { in DoReadFPU() argument
46 .SendRequestReadRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoReadFPU()
88 const FPU &fpu) { in DoWriteFPU() argument
94 .SendRequestWriteRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoWriteFPU()
DRegisterContextKDP_i386.cpp38 int RegisterContextKDP_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() argument
44 .SendRequestReadRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoReadFPU()
85 const FPU &fpu) { in DoWriteFPU() argument
91 .SendRequestWriteRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoWriteFPU()
DRegisterContextKDP_arm64.cpp39 int RegisterContextKDP_arm64::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() argument
45 .SendRequestReadRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoReadFPU()
101 const FPU &fpu) { in DoWriteFPU() argument
107 .SendRequestWriteRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoWriteFPU()
DRegisterContextKDP_arm.cpp39 int RegisterContextKDP_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() argument
45 .SendRequestReadRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoReadFPU()
101 const FPU &fpu) { in DoWriteFPU() argument
107 .SendRequestWriteRegisters(tid, FPURegSet, &fpu, sizeof(fpu), in DoWriteFPU()
/external/rust/crates/gdbstub/src/arch/mips/reg/
Dmips.rs26 pub fpu: MipsFpuRegs<U>, field
128 for reg in self.fpu.r.iter() { in gdb_serialize()
133 write_le_bytes!(&self.fpu.fcsr); in gdb_serialize()
134 write_le_bytes!(&self.fpu.fir); in gdb_serialize()
170 for reg in self.fpu.r.iter_mut() { in gdb_deserialize()
175 self.fpu.fcsr = regs.next().ok_or(())?; in gdb_deserialize()
176 self.fpu.fir = regs.next().ok_or(())?; in gdb_deserialize()

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