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Searched refs:fpu_s0 (Results 1 – 9 of 9) sorted by relevance

/external/llvm-project/lldb/source/Plugins/Process/Windows/Common/arm/
DRegisterContextWindows_arm.cpp54 fpu_s0, fpu_s1, fpu_s2, fpu_s3, fpu_s4, fpu_s5, fpu_s6, fpu_s7,
166 case fpu_s0: in ReadRegister()
198 reg_value.SetUInt32(m_context.S[reg - fpu_s0], RegisterValue::eTypeFloat); in ReadRegister()
331 case fpu_s0: in WriteRegister()
363 m_context.S[reg - fpu_s0] = reg_value.GetAsUInt32(); in WriteRegister()
/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterInfoPOSIX_arm.cpp77 k_num_fpr_registers = fpu_q15 - fpu_s0 + 1,
99 fpu_s0, fpu_s1,
DRegisterContextDarwin_arm.cpp54 fpu_s0, enumerator
397 fpu_s0},
899 fpu_s0, fpu_s1, fpu_s2, fpu_s3, fpu_s4, fpu_s5, fpu_s6,
981 if (reg < fpu_s0) in GetSetForNativeRegNum()
1148 case fpu_s0: in ReadRegister()
1236 case fpu_s0: in WriteRegister()
1387 return fpu_s0; in ConvertRegisterKindToRegisterNumber()
DRegisterInfoPOSIX_arm64.cpp130 fpu_v30, fpu_v31, fpu_s0,
297 uint32_t s_reg_base = fpu_s0; in ConfigureVectorRegisterInfos()
DRegisterInfos_arm.h65 fpu_s0, enumerator
257 static uint32_t g_d0_contains[] = {fpu_s0, fpu_s1, LLDB_INVALID_REGNUM};
308 fpu_d0, fpu_d1, fpu_s0, fpu_s1, fpu_s2, fpu_s3, LLDB_INVALID_REGNUM};
546 fpu_s0},
DRegisterInfos_arm64_sve.h139 static uint32_t g_sve_d0_invalidates[] = {sve_z0, fpu_v0, fpu_s0,
204 static uint32_t g_sve_v0_invalidates[] = {sve_z0, fpu_d0, fpu_s0,
DRegisterContextDarwin_arm64.cpp429 case fpu_s0: in ReadRegister()
463 DataExtractor regdata(&fpu.v[reg - fpu_s0], 4, process_sp->GetByteOrder(), in ReadRegister()
DRegisterInfos_arm64.h156 fpu_s0, enumerator
426 static uint32_t g_d0_invalidates[] = {fpu_v0, fpu_s0, LLDB_INVALID_REGNUM};
/external/llvm-project/lldb/source/Plugins/Process/Windows/Common/arm64/
DRegisterContextWindows_arm64.cpp71 fpu_s0, fpu_s1, fpu_s2, fpu_s3, fpu_s4, fpu_s5, fpu_s6, fpu_s7,
246 case fpu_s0: in ReadRegister()
278 reg_value.SetFloat(m_context.V[reg - fpu_s0].S[0]); in ReadRegister()