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Searched refs:frag_face (Results 1 – 8 of 8) sorted by relevance

/external/mesa3d/src/freedreno/ir3/
Dir3_context.h83 struct ir3_instruction *frag_face, *frag_coord; member
Dir3_shader.h555 bool frag_face, color0_mrt; member
Dir3_compiler_nir.c1841 if (!ctx->frag_face) { in emit_intrinsic()
1842 ctx->so->frag_face = true; in emit_intrinsic()
1843 ctx->frag_face = create_sysval_input(ctx, SYSTEM_VALUE_FRONT_FACE, 0x1); in emit_intrinsic()
1844 ctx->frag_face->regs[0]->flags |= IR3_REG_HALF; in emit_intrinsic()
1850 ctx->frag_face, 0, in emit_intrinsic()
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_program.c553 COND(s[FS].v->frag_face, A5XX_GRAS_CNTL_SIZE) | in fd5_program_emit()
563 COND(s[FS].v->frag_face, A5XX_RB_RENDER_CONTROL0_SIZE) | in fd5_program_emit()
568 COND(s[FS].v->frag_face, A5XX_RB_RENDER_CONTROL1_FACENESS) | in fd5_program_emit()
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_program.c367 COND(s[FS].v->frag_face, A4XX_SP_FS_CTRL_REG1_FACENESS) | in fd4_program_emit()
402 COND(s[FS].v->frag_face, A4XX_RB_RENDER_CONTROL2_FACENESS) | in fd4_program_emit()
/external/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_program.c732 bool need_size = fs->frag_face || fs->fragcoord_compmask != 0; in setup_stateobj()
769 COND(fs->frag_face, A6XX_RB_RENDER_CONTROL1_FACENESS)); in setup_stateobj()
/external/mesa3d/src/gallium/drivers/freedreno/a3xx/
Dfd3_emit.c532 val |= COND(fp->frag_face, A3XX_RB_RENDER_CONTROL_FACENESS); in fd3_emit_state()
/external/mesa3d/src/freedreno/vulkan/
Dtu_pipeline.c1265 bool need_size = fs->frag_face || fs->fragcoord_compmask != 0; in tu6_emit_fs_inputs()
1304 COND(fs->frag_face, A6XX_RB_RENDER_CONTROL1_FACENESS)); in tu6_emit_fs_inputs()