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Searched refs:fs_key (Results 1 – 15 of 15) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_nir_lower_blend.c51 return (c->fs_key->blend.blend_enable || in blend_depends_on_dst_color()
52 c->fs_key->blend.colormask != 0xf || in blend_depends_on_dst_color()
53 c->fs_key->logicop_func != PIPE_LOGICOP_COPY); in blend_depends_on_dst_color()
258 struct pipe_rt_blend_state *blend = &c->fs_key->blend; in vc4_do_blending_f()
305 struct pipe_rt_blend_state *blend = &c->fs_key->blend; in vc4_do_blending_i()
310 enum pipe_format color_format = c->fs_key->color_format; in vc4_do_blending_i()
426 enum pipe_format color_format = c->fs_key->color_format; in vc4_nir_swizzle_and_pack()
446 enum pipe_format color_format = c->fs_key->color_format; in vc4_nir_blend_pipeline()
459 if (c->fs_key->sample_alpha_to_one && c->fs_key->msaa) in vc4_nir_blend_pipeline()
494 packed_color = vc4_logicop(b, c->fs_key->logicop_func, in vc4_nir_blend_pipeline()
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Dvc4_nir_lower_io.c251 c->fs_key->point_sprite_mask)) { in vc4_nir_lower_fs_input()
263 if (!c->fs_key->is_points) in vc4_nir_lower_fs_input()
274 if (c->fs_key->point_coord_upper_left && comp == 1) in vc4_nir_lower_fs_input()
Dvc4_program.c127 qir_uniform_ui(c, c->fs_key->ubo_1_size - 4)); in vc4_ubo_load()
1353 if (c->fs_key->stencil_enabled) { in emit_frag_end()
1356 if (c->fs_key->stencil_twoside) { in emit_frag_end()
1360 if (c->fs_key->stencil_full_writemasks) { in emit_frag_end()
1370 if (c->fs_key->depth_enabled) { in emit_frag_end()
1612 c->fs_key->point_sprite_mask)) { in ntq_setup_inputs()
2235 c->fs_key = (struct vc4_fs_key *)key; in vc4_shader_ntq()
2236 if (c->fs_key->is_points) { in vc4_shader_ntq()
2239 } else if (c->fs_key->is_lines) { in vc4_shader_ntq()
2298 if (c->fs_key && c->fs_key->light_twoside) in vc4_shader_ntq()
Dvc4_qir.h451 struct vc4_fs_key *fs_key; member
/external/mesa3d/src/broadcom/compiler/
Dv3d_nir_lower_logic_ops.c196 if (c->fs_key->color_fmt[rt].swizzle[0] == 2 && in v3d_get_format_swizzle_for_rt()
197 c->fs_key->color_fmt[rt].format != PIPE_FORMAT_B5G6R5_UNORM) { in v3d_get_format_swizzle_for_rt()
200 return c->fs_key->color_fmt[rt].swizzle; in v3d_get_format_swizzle_for_rt()
236 op_res[i] = v3d_logicop(b, c->fs_key->logicop_func, src, dst); in v3d_emit_logic_op_raw()
261 v3d_logicop(b, c->fs_key->logicop_func, packed_src, packed_dst); in v3d_emit_logic_op_unorm()
278 if (c->fs_key->color_fmt[rt].format == PIPE_FORMAT_R10G10B10A2_UNORM) { in v3d_nir_emit_logic_op()
284 if (util_format_is_unorm(c->fs_key->color_fmt[rt].format)) { in v3d_nir_emit_logic_op()
320 const int logic_op = c->fs_key->logicop_func; in v3d_nir_lower_logic_op_instr()
321 if (c->fs_key->msaa && logicop_depends_on_dst_color(logic_op)) { in v3d_nir_lower_logic_op_instr()
374 c->fs_key->color_fmt[rt].format; in v3d_nir_lower_logic_ops_block()
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Dnir_to_vir.c743 if (c->fs_key->shade_model_flat) { in emit_fragment_varying()
1282 if (!(c->fs_key->cbufs & (1 << rt)) || !c->output_color_var[rt]) in vir_emit_tlb_color_write()
1297 if (c->fs_key->swap_color_rb & (1 << rt)) in vir_emit_tlb_color_write()
1304 (c->fs_key->f32_color_rb & (1 << rt)); in vir_emit_tlb_color_write()
1314 if (c->fs_key->f32_color_rb & (1 << rt)) { in vir_emit_tlb_color_write()
1339 if (c->fs_key->swap_color_rb & (1 << rt)) { in vir_emit_tlb_color_write()
1344 if (c->fs_key->sample_alpha_to_one) in vir_emit_tlb_color_write()
1392 if (c->fs_key->cbufs & (1 << rt) && c->output_color_var[rt]) in emit_frag_end()
1396 if (c->fs_key->sample_alpha_to_coverage && c->output_color_var[0]) { in emit_frag_end()
1424 c->fs_key->sample_alpha_to_coverage || in emit_frag_end()
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Dvir.c903 if (c->fs_key->int_color_rb & mask) { in v3d_fixup_fs_output_types()
907 } else if (c->fs_key->uint_color_rb & mask) { in v3d_fixup_fs_output_types()
918 if (c->fs_key->int_color_rb || c->fs_key->uint_color_rb) in v3d_nir_lower_fs_early()
923 if (c->fs_key->line_smoothing) { in v3d_nir_lower_fs_early()
971 if (c->fs_key->light_twoside) in v3d_nir_lower_fs_late()
974 if (c->fs_key->clamp_color) in v3d_nir_lower_fs_late()
1082 c->fs_key = (struct v3d_fs_key *) c->key; in v3d_attempt_compile()
Dv3d_compiler.h668 struct v3d_fs_key *fs_key; member
/external/mesa3d/src/amd/vulkan/
Dradv_meta_resolve.c291 unsigned fs_key = radv_format_meta_fs_key(format); in radv_device_init_meta_resolve_state() local
292 res = create_pass(device, format, &state->resolve.pass[fs_key]); in radv_device_init_meta_resolve_state()
298 &state->resolve.pipeline[fs_key], state->resolve.pass[fs_key]); in radv_device_init_meta_resolve_state()
322 unsigned fs_key = radv_format_meta_fs_key(vk_format); in emit_resolve() local
327 device->meta_state.resolve.pipeline[fs_key]); in emit_resolve()
395 unsigned fs_key) in build_resolve_pipeline() argument
399 if (device->meta_state.resolve.pipeline[fs_key]) in build_resolve_pipeline()
403 if (device->meta_state.resolve.pipeline[fs_key]) { in build_resolve_pipeline()
410 … = create_pass(device, radv_fs_key_format_exemplars[fs_key], &device->meta_state.resolve.pass[fs_k… in build_resolve_pipeline()
415 …e, vs_module_h, &device->meta_state.resolve.pipeline[fs_key], device->meta_state.resolve.pass[fs_k… in build_resolve_pipeline()
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Dradv_meta_blit2d.c210 enum blit2d_src_type src_type, unsigned fs_key, in bind_pipeline() argument
214 cmd_buffer->device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]; in bind_pipeline()
291 unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format); in radv_meta_blit2d_normal_dst() local
294 if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key] == VK_NULL_HANDLE) { in radv_meta_blit2d_normal_dst()
295 …= blit2d_init_color_pipeline(device, src_type, radv_fs_key_format_exemplars[fs_key], log2_samples); in radv_meta_blit2d_normal_dst()
305 .renderPass = device->meta_state.blit2d_render_passes[fs_key][dst_layout], in radv_meta_blit2d_normal_dst()
318 bind_pipeline(cmd_buffer, src_type, fs_key, log2_samples); in radv_meta_blit2d_normal_dst()
738 unsigned fs_key = radv_format_meta_fs_key(format); in blit2d_init_color_pipeline() local
742 if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]) { in blit2d_init_color_pipeline()
794 if (!device->meta_state.blit2d_render_passes[fs_key][dst_layout]) { in blit2d_init_color_pipeline()
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Dradv_meta_resolve_fs.c162 unsigned fs_key = radv_format_meta_fs_key(format); in create_resolve_pipeline() local
163 VkPipeline *pipeline = &device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key]; in create_resolve_pipeline()
183 VkRenderPass *rp = &device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][0]; in create_resolve_pipeline()
832 unsigned fs_key = radv_format_meta_fs_key(dst_iview->vk_format); in radv_get_resolve_pipeline() local
837 pipeline = &device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key]; in radv_get_resolve_pipeline()
842 radv_fs_key_format_exemplars[fs_key]); in radv_get_resolve_pipeline()
1036 unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format); in radv_meta_resolve_fragment_image() local
1043 if (!device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][dst_layout]) { in radv_meta_resolve_fragment_image()
1044 …VkResult ret = create_resolve_pipeline(device, samples_log2, radv_fs_key_format_exemplars[fs_key]); in radv_meta_resolve_fragment_image()
1051 rp = device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][dst_layout]; in radv_meta_resolve_fragment_image()
Dradv_meta_blit.c38 unsigned fs_key,
347 unsigned fs_key = 0; in meta_emit_blit() local
351 fs_key = radv_format_meta_fs_key(dest_image->vk_format); in meta_emit_blit()
356 .renderPass = device->meta_state.blit.render_pass[fs_key][dst_layout], in meta_emit_blit()
367 pipeline = &device->meta_state.blit.pipeline_1d_src[fs_key]; in meta_emit_blit()
370 pipeline = &device->meta_state.blit.pipeline_2d_src[fs_key]; in meta_emit_blit()
373 pipeline = &device->meta_state.blit.pipeline_3d_src[fs_key]; in meta_emit_blit()
446 …pipeline(device, src_iview->aspect_mask, translate_sampler_dim(src_image->type), fs_key, pipeline); in meta_emit_blit()
811 unsigned fs_key, in build_pipeline() argument
830 rp = device->meta_state.blit.render_pass[fs_key][0]; in build_pipeline()
Dradv_meta_clear.c409 unsigned fs_key; in emit_color_clear() local
427 fs_key = radv_format_meta_fs_key(format); in emit_color_clear()
429 if (fs_key == -1) { in emit_color_clear()
434 if (device->meta_state.clear[samples_log2].render_pass[fs_key] == VK_NULL_HANDLE) { in emit_color_clear()
435 VkResult ret = create_color_renderpass(device, radv_fs_key_format_exemplars[fs_key], in emit_color_clear()
437 … &device->meta_state.clear[samples_log2].render_pass[fs_key]); in emit_color_clear()
444 if (device->meta_state.clear[samples_log2].color_pipelines[fs_key] == VK_NULL_HANDLE) { in emit_color_clear()
446 … &device->meta_state.clear[samples_log2].color_pipelines[fs_key], in emit_color_clear()
447 device->meta_state.clear[samples_log2].render_pass[fs_key]); in emit_color_clear()
454 pipeline = device->meta_state.clear[samples_log2].color_pipelines[fs_key]; in emit_color_clear()
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/external/mesa3d/docs/relnotes/
D17.3.4.rst96 - radv: add fs_key meta format support to resolve passes.
/external/mesa3d/src/intel/compiler/
Dbrw_fs_nir.cpp1006 struct brw_wm_prog_key *fs_key = (struct brw_wm_prog_key *) this->key; in nir_emit_alu() local
1197 if (fs_key->high_quality_derivatives) { in nir_emit_alu()
1210 if (fs_key->high_quality_derivatives) { in nir_emit_alu()