Home
last modified time | relevance | path

Searched refs:fsr (Results 1 – 25 of 38) sorted by relevance

12

/external/llvm-project/llvm/test/CodeGen/SPARC/
D2008-10-10-InlineAsmMemoryOperand.ll9 %fsr = alloca i32 ; <i32*> [#uses=4]
10 call void asm "st %fsr, $0", "=*m"(i32* %fsr) nounwind
11 %0 = load i32, i32* %fsr, align 4 ; <i32> [#uses=1]
13 store i32 %1, i32* %fsr, align 4
14 call void asm sideeffect "ld $0, %fsr", "*m"(i32* %fsr) nounwind
/external/llvm/test/CodeGen/SPARC/
D2008-10-10-InlineAsmMemoryOperand.ll9 %fsr = alloca i32 ; <i32*> [#uses=4]
10 call void asm "st %fsr, $0", "=*m"(i32* %fsr) nounwind
11 %0 = load i32, i32* %fsr, align 4 ; <i32> [#uses=1]
13 store i32 %1, i32* %fsr, align 4
14 call void asm sideeffect "ld $0, %fsr", "*m"(i32* %fsr) nounwind
/external/llvm/test/MC/Sparc/
Dsparc-special-registers.s43 ! CHECK: ld [%g2+20], %fsr ! encoding: [0xc1,0x08,0xa0,0x14]
44 ld [%g2 + 20],%fsr
46 ! CHECK: ld [%g2+%i5], %fsr ! encoding: [0xc1,0x08,0x80,0x1d]
47 ld [%g2 + %i5],%fsr
49 ! CHECK: st %fsr, [%g2+20] ! encoding: [0xc1,0x28,0xa0,0x14]
50 st %fsr,[%g2 + 20]
52 ! CHECK: st %fsr, [%g2+%i5] ! encoding: [0xc1,0x28,0x80,0x1d]
53 st %fsr,[%g2 + %i5]
Dsparcv9-instructions.s95 ! V8-NEXT: ldx [%g2 + 20],%fsr
96 ! V9: ldx [%g2+20], %fsr ! encoding: [0xc3,0x08,0xa0,0x14]
97 ldx [%g2 + 20],%fsr
100 ! V8-NEXT: ldx [%g2 + %i5],%fsr
101 ! V9: ldx [%g2+%i5], %fsr ! encoding: [0xc3,0x08,0x80,0x1d]
102 ldx [%g2 + %i5],%fsr
105 ! V8-NEXT: stx %fsr,[%g2 + 20]
106 ! V9: stx %fsr, [%g2+20] ! encoding: [0xc3,0x28,0xa0,0x14]
107 stx %fsr,[%g2 + 20]
110 ! V8-NEXT: stx %fsr,[%g2 + %i5]
[all …]
/external/llvm-project/llvm/test/MC/Sparc/
Dsparc-special-registers.s43 ! CHECK: ld [%g2+20], %fsr ! encoding: [0xc1,0x08,0xa0,0x14]
44 ld [%g2 + 20],%fsr
46 ! CHECK: ld [%g2+%i5], %fsr ! encoding: [0xc1,0x08,0x80,0x1d]
47 ld [%g2 + %i5],%fsr
49 ! CHECK: st %fsr, [%g2+20] ! encoding: [0xc1,0x28,0xa0,0x14]
50 st %fsr,[%g2 + 20]
52 ! CHECK: st %fsr, [%g2+%i5] ! encoding: [0xc1,0x28,0x80,0x1d]
53 st %fsr,[%g2 + %i5]
Dsparcv9-instructions.s95 ! V8-NEXT: ldx [%g2 + 20],%fsr
96 ! V9: ldx [%g2+20], %fsr ! encoding: [0xc3,0x08,0xa0,0x14]
97 ldx [%g2 + 20],%fsr
100 ! V8-NEXT: ldx [%g2 + %i5],%fsr
101 ! V9: ldx [%g2+%i5], %fsr ! encoding: [0xc3,0x08,0x80,0x1d]
102 ldx [%g2 + %i5],%fsr
105 ! V8-NEXT: stx %fsr,[%g2 + 20]
106 ! V9: stx %fsr, [%g2+20] ! encoding: [0xc3,0x28,0xa0,0x14]
107 stx %fsr,[%g2 + 20]
110 ! V8-NEXT: stx %fsr,[%g2 + %i5]
[all …]
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/exception/unhandled_abort/
Dformat11 field:unsigned int fsr; offset:24; size:4; signed:0;
13 print fmt: "addr:%lu, fsr:%u", REC->addr, REC->fsr
/external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/exception/unhandled_abort/
Dformat11 field:unsigned int fsr; offset:16; size:4; signed:0;
13 print fmt: "addr:%lu, fsr:%u", REC->addr, REC->fsr
/external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/exception/user_fault/
Dformat11 field:unsigned int fsr; offset:16; size:4; signed:0;
13 print fmt: "task_name:%s addr:%lu, fsr:%u", __get_str(task_name), REC->addr, REC->fsr
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/exception/user_fault/
Dformat11 field:unsigned int fsr; offset:24; size:4; signed:0;
13 print fmt: "task_name:%s addr:%lu, fsr:%u", __get_str(task_name), REC->addr, REC->fsr
/external/perfetto/src/traced/probes/ftrace/test/data/android_hammerhead_MRA59G_3.4.0/events/exception/user_fault/
Dformat12 field:unsigned int fsr; offset:20; size:4; signed:0;
14 print fmt: "task_name:%s addr:%lu, fsr:%u", __get_str(task_name), REC->addr, REC->fsr
/external/python/cpython2/Lib/plat-mac/
Dfindertools.py104 fsr = Carbon.File.FSRef(file)
105 file_alias = fsr.FSNewAliasMinimal()
111 fsr = Carbon.File.FSRef(file)
112 file_alias = fsr.FSNewAliasMinimal()
119 fsr = Carbon.File.FSRef(file)
120 file_alias = fsr.FSNewAliasMinimal()
380 fsr = Carbon.File.FSRef(folder)
381 folder_alias = fsr.FSNewAliasMinimal()
438 fsr = Carbon.File.FSRef(folder)
439 folder_alias = fsr.FSNewAliasMinimal()
[all …]
/external/arm-trusted-firmware/drivers/mtd/nor/
Dspi_nor.c69 static inline int spi_nor_read_fsr(uint8_t *fsr) in spi_nor_read_fsr() argument
71 return spi_nor_reg(SPI_NOR_OP_READ_FSR, fsr, 1U, SPI_MEM_DATA_IN); in spi_nor_read_fsr()
95 uint8_t fsr; in spi_nor_ready() local
97 ret = spi_nor_read_fsr(&fsr); in spi_nor_ready()
102 return (((fsr & FSR_READY) != 0U) && ((sr & SR_WIP) == 0U)) ? in spi_nor_ready()
/external/llvm-project/llvm/test/MC/RISCV/
Drv32zbt-valid.s24 # CHECK-ASM-AND-OBJ: fsr t0, t1, t2, t3
26 fsr t0, t1, t2, t3 label
Drv32zbt-invalid.s10 fsr t0, t1, t2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
/external/google-breakpad/src/google_breakpad/common/
Dminidump_cpu_sparc.h88 uint64_t fsr; /* FPU status register */ member
/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterInfoPOSIX_arm.h39 uint32_t fsr; /* Fault status */ member
DRegisterContextDarwin_arm.h124 uint32_t fsr; /* Fault status */ member
/external/llvm-project/llvm/test/MC/Disassembler/Sparc/
Dsparc-special-registers.txt36 # CHECK: st %fsr, [%i5]
/external/llvm/test/MC/Disassembler/Sparc/
Dsparc-special-registers.txt36 # CHECK: st %fsr, [%i5]
/external/python/cpython2/Mac/Modules/file/
D_Filemodule.c32 extern int _PyMac_GetFSRef(PyObject *v, FSRef *fsr);
45 extern int PyMac_GetFSRef(PyObject *v, FSRef *fsr);
120 FSRef fsr; in _PyMac_GetFullPathname() local
124 err = FSpMakeFSRef(fss, &fsr); in _PyMac_GetFullPathname()
134 err = FSpMakeFSRef(&fss2, &fsr); in _PyMac_GetFullPathname()
137 err = (OSErr)FSRefMakePath(&fsr, (unsigned char*)path, len-1); in _PyMac_GetFullPathname()
154 err = (OSErr)FSRefMakePath(&fsr, (unsigned char*)path, len); in _PyMac_GetFullPathname()
3258 FSRef fsr; in PyMac_GetFSSpec() local
3278 if ( PyMac_GetFSRef(v, &fsr) ) { in PyMac_GetFSSpec()
3279 err = FSGetCatalogInfo(&fsr, kFSCatInfoNone, NULL, NULL, spec, NULL); in PyMac_GetFSSpec()
[all …]
/external/python/cpython2/Mac/Modules/
DNav.c306 FSRef fsr; in navrr_getattr() local
379 if ((err=AEGetDescData(&desc, &fsr, sizeof(FSRef)))) { in navrr_getattr()
384 rvitem = PyMac_BuildFSRef(&fsr); in navrr_getattr()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp54 fsr(src) in SrcRegister()
57 SrcRegister(const struct tgsi_src_register& src) : reg(src), fsr(NULL) { } in SrcRegister()
61 fsr(NULL) in SrcRegister()
78 fsr(NULL) in SrcRegister()
87 return (dim && fsr) ? fsr->Dimension.Indirect : reg.Indirect; in isIndirect()
92 return (dim && fsr) ? fsr->Dimension.Index : reg.Index; in getIndex()
103 return fsr->Indirect.ArrayID; in getArrayId()
111 assert(fsr && isIndirect(dim)); in getIndirect()
113 return SrcRegister(fsr->DimIndirect); in getIndirect()
114 return SrcRegister(fsr->Indirect); in getIndirect()
[all …]
/external/compiler-rt/lib/sanitizer_common/
Dsanitizer_linux.cc1294 uptr fsr = ucontext->uc_mcontext.error_code; in GetWriteFlag() local
1298 if (fsr == 0) return UNKNOWN; in GetWriteFlag()
1299 return fsr & FSR_WRITE ? WRITE : READ; in GetWriteFlag()
/external/llvm-project/llvm/test/CodeGen/RISCV/
Drv64Zbt.ll270 ; RV64IB-NEXT: fsr a0, a1, a0, a2
276 ; RV64IBT-NEXT: fsr a0, a1, a0, a2

12