Home
last modified time | relevance | path

Searched refs:g1_ffe_cap_sel (Results 1 – 5 of 5) sorted by relevance

/external/arm-trusted-firmware/plat/marvell/octeontx/otx2/t91/t9130/board/
Dphy-porting-layer.h23 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
34 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
51 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
63 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
80 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
91 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
/external/arm-trusted-firmware/plat/marvell/armada/a8k/a80x0/board/
Dphy-porting-layer.h21 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
30 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
45 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
54 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
/external/arm-trusted-firmware/drivers/marvell/comphy/
Dphy-default-porting-layer.h19 .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, .align90 = 0x5f,
Dphy-comphy-cp110.h14 uint8_t g1_ffe_cap_sel; member
Dphy-comphy-cp110.c856 xfi_static_values->g1_ffe_cap_sel, in mvebu_cp110_comphy_xfi_power_on()
1096 data |= xfi_static_values->g1_ffe_cap_sel << in mvebu_cp110_comphy_xfi_power_on()
2120 uint32_t g1_ffe_cap_sel, g1_ffe_res_sel, align90, g1_dfe_res; in mvebu_cp110_comphy_xfi_rx_training() local
2196 g1_ffe_cap_sel = ((mmio_read_32(hpipe_addr + in mvebu_cp110_comphy_xfi_rx_training()
2212 g1_ffe_res_sel, g1_ffe_cap_sel, align90, g1_dfe_res); in mvebu_cp110_comphy_xfi_rx_training()
2230 data = g1_ffe_cap_sel << HPIPE_G1_SETTINGS_3_G1_FFE_CAP_SEL_OFFSET; in mvebu_cp110_comphy_xfi_rx_training()
2261 printf("\t.g1_ffe_cap_sel = 0x%x,\n", g1_ffe_cap_sel); in mvebu_cp110_comphy_xfi_rx_training()