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/external/mesa3d/src/intel/compiler/
Dbrw_inst.h1193 #define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low, \ in REG_TYPE() argument
1204 brw_inst_set_bits(inst, g8_high, g8_low, value & 0x1ff); \ in REG_TYPE()
1217 return brw_inst_bits(inst, g8_high, g8_low) | \
1230 #define BRW_IA16_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \ argument
1239 brw_inst_set_bits(inst, g8_high, g8_low, GET_BITS(value, 8, 4)); \
1251 return (brw_inst_bits(inst, g8_high, g8_low) << 4) | \