Searched refs:ge_cntl (Results 1 – 4 of 4) sorted by relevance
682 unsigned ge_cntl; in gfx10_emit_ge_cntl() local686 ge_cntl = S_03096C_PRIM_GRP_SIZE(num_patches) | in gfx10_emit_ge_cntl()690 ge_cntl = si_get_vs_state(sctx)->ge_cntl; in gfx10_emit_ge_cntl()708 ge_cntl = S_03096C_PRIM_GRP_SIZE(primgroup_size) | S_03096C_VERT_GRP_SIZE(vertgroup_size) | in gfx10_emit_ge_cntl()712 ge_cntl |= S_03096C_PACKET_TO_ONE_PA(si_is_line_stipple_enabled(sctx)); in gfx10_emit_ge_cntl()714 if (ge_cntl != sctx->last_multi_vgt_param) { in gfx10_emit_ge_cntl()715 radeon_set_uconfig_reg(sctx->gfx_cs, R_03096C_GE_CNTL, ge_cntl); in gfx10_emit_ge_cntl()716 sctx->last_multi_vgt_param = ge_cntl; in gfx10_emit_ge_cntl()
818 unsigned ge_cntl; member
1264 shader->ge_cntl = S_03096C_PRIM_GRP_SIZE(shader->ngg.max_gsprims) | in gfx10_shader_ngg()1267 shader->ge_cntl = S_03096C_PRIM_GRP_SIZE(shader->ngg.max_gsprims) | in gfx10_shader_ngg()1270 shader->ge_cntl = S_03096C_PRIM_GRP_SIZE(shader->ngg.max_gsprims) | in gfx10_shader_ngg()1282 shader->ge_cntl &= C_03096C_VERT_GRP_SIZE; in gfx10_shader_ngg()1285 shader->ge_cntl |= S_03096C_VERT_GRP_SIZE(shader->ngg.hw_max_esverts - 5); in gfx10_shader_ngg()
4318 unsigned ge_cntl; in radv_pipeline_generate_hw_ngg() local4400 ge_cntl = S_03096C_PRIM_GRP_SIZE(ngg_state->max_gsprims) | in radv_pipeline_generate_hw_ngg()4412 ge_cntl &= C_03096C_VERT_GRP_SIZE; in radv_pipeline_generate_hw_ngg()4415 ge_cntl |= S_03096C_VERT_GRP_SIZE(ngg_state->hw_max_esverts - 5); in radv_pipeline_generate_hw_ngg()4419 radeon_set_uconfig_reg(ctx_cs, R_03096C_GE_CNTL, ge_cntl); in radv_pipeline_generate_hw_ngg()