| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 111 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass() function in TargetRegisterInfo
160 const TargetRegisterClass *SubClass = getAllocatableClass(RC); in getAllocatableSet()
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| D | TwoAddressInstructionPass.cpp | 1302 TRI->getAllocatableClass( in tryInstructionTransform()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 135 RC = TRI->getAllocatableClass( in EmitCopyFromReg()
204 TRI->getAllocatableClass(TII->getRegClass(II, i, TRI, *MF)); in CreateVirtualRegisters()
320 OpRC = TRI->getAllocatableClass(OpRC); in AddRegisterOperand()
379 II ? TRI->getAllocatableClass(TII->getRegClass(*II, IIOpNum, TRI, *MF)) in AddOperand()
615 TRI->getAllocatableClass(TRI->getRegClass(DstRCIdx)); in EmitCopyToRegClassNode()
633 Register NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 136 RC = TRI->getAllocatableClass( in EmitCopyFromReg()
222 TRI->getAllocatableClass(TII->getRegClass(II, i, TRI, *MF)); in CreateVirtualRegisters()
335 DstRC = TRI->getAllocatableClass(TII->getRegClass(*II,IIOpNum,TRI,*MF)); in AddRegisterOperand()
595 TRI->getAllocatableClass(TRI->getRegClass(DstRCIdx)); in EmitCopyToRegClassNode()
613 unsigned NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 138 RC = TRI->getAllocatableClass( in EmitCopyFromReg()
212 TRI->getAllocatableClass(TII->getRegClass(II, i, TRI, *MF)); in CreateVirtualRegisters()
328 OpRC = TRI->getAllocatableClass(OpRC); in AddRegisterOperand()
387 II ? TRI->getAllocatableClass(TII->getRegClass(*II, IIOpNum, TRI, *MF)) in AddOperand()
615 TRI->getAllocatableClass(TRI->getRegClass(DstRCIdx)); in EmitCopyToRegClassNode()
633 Register NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 173 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass() function in TargetRegisterInfo
222 const TargetRegisterClass *SubClass = getAllocatableClass(RC); in getAllocatableSet()
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| D | TwoAddressInstructionPass.cpp | 1362 TRI->getAllocatableClass( in tryInstructionTransform()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 193 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass() function in TargetRegisterInfo
242 const TargetRegisterClass *SubClass = getAllocatableClass(RC); in getAllocatableSet()
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| D | TwoAddressInstructionPass.cpp | 1217 TRI->getAllocatableClass( in tryInstructionTransform()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 349 getAllocatableClass(const TargetRegisterClass *RC) const;
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 317 getAllocatableClass(const TargetRegisterClass *RC) const;
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 323 getAllocatableClass(const TargetRegisterClass *RC) const;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 1822 return getAllocatableClass(RC); in getConstrainedRegClassForOperand()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 2053 return getAllocatableClass(RC); in getConstrainedRegClassForOperand()
|