Home
last modified time | relevance | path

Searched refs:getCommonSubClass (Results 1 – 25 of 47) sorted by relevance

12

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp1277 return getCommonSubClass(&AMDGPU::VGPR_32RegClass, RC) != nullptr; in hasVGPRs()
1279 return getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) != nullptr; in hasVGPRs()
1281 return getCommonSubClass(&AMDGPU::VReg_96RegClass, RC) != nullptr; in hasVGPRs()
1283 return getCommonSubClass(&AMDGPU::VReg_128RegClass, RC) != nullptr; in hasVGPRs()
1285 return getCommonSubClass(&AMDGPU::VReg_160RegClass, RC) != nullptr; in hasVGPRs()
1287 return getCommonSubClass(&AMDGPU::VReg_256RegClass, RC) != nullptr; in hasVGPRs()
1289 return getCommonSubClass(&AMDGPU::VReg_512RegClass, RC) != nullptr; in hasVGPRs()
1291 return getCommonSubClass(&AMDGPU::VReg_1024RegClass, RC) != nullptr; in hasVGPRs()
1293 return getCommonSubClass(&AMDGPU::VReg_1RegClass, RC) != nullptr; in hasVGPRs()
1306 return getCommonSubClass(&AMDGPU::AGPR_32RegClass, RC) != nullptr; in hasAGPRs()
[all …]
/external/llvm/lib/Target/AMDGPU/
DSILowerI1Copies.cpp106 TRI->getCommonSubClass(SrcRC, &AMDGPU::SGPR_64RegClass)) { in runOnMachineFunction()
132 } else if (TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_64RegClass) && in runOnMachineFunction()
DSIRegisterInfo.cpp713 return getCommonSubClass(&AMDGPU::VGPR_32RegClass, RC) != nullptr; in hasVGPRs()
715 return getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) != nullptr; in hasVGPRs()
717 return getCommonSubClass(&AMDGPU::VReg_96RegClass, RC) != nullptr; in hasVGPRs()
719 return getCommonSubClass(&AMDGPU::VReg_128RegClass, RC) != nullptr; in hasVGPRs()
721 return getCommonSubClass(&AMDGPU::VReg_256RegClass, RC) != nullptr; in hasVGPRs()
723 return getCommonSubClass(&AMDGPU::VReg_512RegClass, RC) != nullptr; in hasVGPRs()
828 return getCommonSubClass(DefRC, SrcRC) != nullptr; in shouldRewriteCopySrc()
/external/llvm/lib/CodeGen/
DLiveStackAnalysis.cpp70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
DTargetRegisterInfo.cpp195 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
317 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
DMachineRegisterInfo.cpp57 getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
DDetectDeadLanes.cpp193 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
DRegisterCoalescer.cpp375 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
973 TRI->getCommonSubClass(DefRC, DstRC); in reMaterializeTrivialDef()
1025 NewRC = TRI->getCommonSubClass(NewRC, DefRC); in reMaterializeTrivialDef()
/external/llvm-project/llvm/lib/CodeGen/
DLiveStacks.cpp70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
DTargetRegisterInfo.cpp269 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
390 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
DDetectDeadLanes.cpp187 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
DMachineRegisterInfo.cpp75 MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveStacks.cpp70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
DTargetRegisterInfo.cpp249 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
370 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
DDetectDeadLanes.cpp190 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
DMachineRegisterInfo.cpp75 MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.cpp153 TRI->getCommonSubClass(getRC32(FalseMO, VRM, MRI), in getRegAllocationHints()
156 RC = TRI->getCommonSubClass(RC, in getRegAllocationHints()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.cpp155 TRI->getCommonSubClass(getRC32(FalseMO, VRM, MRI), in getRegAllocationHints()
158 RC = TRI->getCommonSubClass(RC, in getRegAllocationHints()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp1798 return getCommonSubClass(&AMDGPU::VGPR_LO16RegClass, RC) != nullptr || in hasVGPRs()
1799 getCommonSubClass(&AMDGPU::VGPR_HI16RegClass, RC) != nullptr; in hasVGPRs()
1806 return getCommonSubClass(VRC, RC) != nullptr; in hasVGPRs()
1818 return getCommonSubClass(ARC, RC) != nullptr; in hasAGPRs()
1898 return getCommonSubClass(DefRC, SrcRC) != nullptr; in shouldRewriteCopySrc()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h664 getCommonSubClass(const TargetRegisterClass *A,
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h684 getCommonSubClass(const TargetRegisterClass *A,
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp143 TRI->getCommonSubClass(UseRC, RC, VT.SimpleTy); in EmitCopyFromReg()
231 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h703 getCommonSubClass(const TargetRegisterClass *A,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp142 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
214 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp145 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
222 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()

12