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Searched refs:getFeatureBits (Results 1 – 25 of 231) sorted by relevance

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/external/llvm-project/llvm/test/TableGen/
DAsmPredicateCombiningRISCV.td68 // COMPRESS: if (STI.getFeatureBits()[arch::AsmCond1] &&
74 // COMPRESS: if (STI.getFeatureBits()[arch::AsmCond2a] &&
75 // COMPRESS-NEXT: STI.getFeatureBits()[arch::AsmCond2b] &&
81 // COMPRESS: if ((STI.getFeatureBits()[arch::AsmCond3a] || STI.getFeatureBits()[arch::AsmCond3…
87 // COMPRESS: if (STI.getFeatureBits()[arch::AsmCond1] &&
88 // COMPRESS-NEXT: STI.getFeatureBits()[arch::AsmCond2a] &&
89 // COMPRESS-NEXT: STI.getFeatureBits()[arch::AsmCond2b] &&
95 // COMPRESS: if (STI.getFeatureBits()[arch::AsmCond1] &&
96 // COMPRESS-NEXT: (STI.getFeatureBits()[arch::AsmCond3a] || STI.getFeatureBits()[arch::AsmCond3b]) …
/external/llvm-project/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp292 if (STI->getFeatureBits().test(FeatureWavefrontSize16)) in getWavefrontSize()
294 if (STI->getFeatureBits().test(FeatureWavefrontSize32)) in getWavefrontSize()
301 if (STI->getFeatureBits().test(FeatureLocalMemorySize32768)) in getLocalMemorySize()
303 if (STI->getFeatureBits().test(FeatureLocalMemorySize65536)) in getLocalMemorySize()
313 if (isGFX10Plus(*STI) && STI->getFeatureBits().test(FeatureCuMode)) in getEUsPerCU()
384 if (STI->getFeatureBits().test(FeatureSGPRInitBug)) in getAddressableNumSGPRs()
406 if (STI->getFeatureBits().test(FeatureTrapHandler)) in getMinNumSGPRs()
423 if (STI->getFeatureBits().test(FeatureTrapHandler)) in getMaxNumSGPRs()
456 STI->getFeatureBits().test(AMDGPU::FeatureXNACK)); in getNumExtraSGPRs()
469 STI->getFeatureBits().test(FeatureWavefrontSize32); in getVGPRAllocGranule()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp249 STI->getFeatureBits().test(FeatureCodeObjectV3); in hasCodeObjectV3()
253 if (STI->getFeatureBits().test(FeatureWavefrontSize16)) in getWavefrontSize()
255 if (STI->getFeatureBits().test(FeatureWavefrontSize32)) in getWavefrontSize()
262 if (STI->getFeatureBits().test(FeatureLocalMemorySize32768)) in getLocalMemorySize()
264 if (STI->getFeatureBits().test(FeatureLocalMemorySize65536)) in getLocalMemorySize()
348 if (STI->getFeatureBits().test(FeatureSGPRInitBug)) in getAddressableNumSGPRs()
370 if (STI->getFeatureBits().test(FeatureTrapHandler)) in getMinNumSGPRs()
387 if (STI->getFeatureBits().test(FeatureTrapHandler)) in getMaxNumSGPRs()
420 STI->getFeatureBits().test(AMDGPU::FeatureXNACK)); in getNumExtraSGPRs()
433 STI->getFeatureBits().test(FeatureWavefrontSize32); in getVGPRAllocGranule()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.cpp67 if (!STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding] && !isGFX10()) in AMDGPUDisassembler()
306 if (STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]) { in getInstruction()
315 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) { in getInstruction()
423 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in convertSDWAInst()
424 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertSDWAInst()
428 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in convertSDWAInst()
491 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertMIMGInst()
558 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10] && !IsNSA && in convertMIMGInst()
1108 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWASrc()
1109 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in decodeSDWASrc()
[all …]
/external/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVAsmBackend.h38 STI.getTargetTriple(), STI.getFeatureBits(), Options.getABIName()); in RISCVAsmBackend()
39 RISCVFeatures::validate(STI.getTargetTriple(), STI.getFeatureBits()); in RISCVAsmBackend()
49 return ForceRelocs || STI.getFeatureBits()[RISCV::FeatureRelax]; in willForceRelocations()
DRISCVAsmBackend.cpp111 return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs; in shouldForceRelocation()
201 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in writeNopData()
417 if (!STI.getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertExtraNopBytesForCodeAlign()
420 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in shouldInsertExtraNopBytesForCodeAlign()
440 if (!STI.getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertFixupForCodeAlign()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUMCAsmInfo.cpp60 if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding]) in getMaxInstLength()
64 if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getMaxInstLength()
DSIMCCodeEmitter.cpp138 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
174 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
210 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
263 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getLitEncoding()
283 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
310 if ((bytes > 8 && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) || in encodeInstruction()
311 (bytes > 4 && !STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])) in encodeInstruction()
DR600MCCodeEmitter.cpp103 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
115 if (!(STI.getFeatureBits()[R600::FeatureCaymanISA])) { in encodeInstruction()
148 if ((STI.getFeatureBits()[R600::FeatureR600ALUInst]) && in encodeInstruction()
/external/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUMCAsmInfo.cpp62 if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding]) in getMaxInstLength()
66 if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getMaxInstLength()
DSIMCCodeEmitter.cpp146 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
182 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
218 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
271 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getLitEncoding()
295 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
322 if ((bytes > 8 && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) || in encodeInstruction()
323 (bytes > 4 && !STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])) in encodeInstruction()
DR600MCCodeEmitter.cpp103 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
115 if (!(STI.getFeatureBits()[R600::FeatureCaymanISA])) { in encodeInstruction()
148 if ((STI.getFeatureBits()[R600::FeatureR600ALUInst]) && in encodeInstruction()
/external/llvm-project/llvm/lib/MC/
DMCInstPrinter.cpp69 return STI->getFeatureBits().test(C.Value); in matchAliasCondition()
71 return !STI->getFeatureBits().test(C.Value); in matchAliasCondition()
76 OrPredicateResult |= STI->getFeatureBits().test(C.Value); in matchAliasCondition()
80 OrPredicateResult |= !(STI->getFeatureBits().test(C.Value)); in matchAliasCondition()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVAsmBackend.h38 STI.getTargetTriple(), STI.getFeatureBits(), Options.getABIName()); in RISCVAsmBackend()
39 RISCVFeatures::validate(STI.getTargetTriple(), STI.getFeatureBits()); in RISCVAsmBackend()
49 return ForceRelocs || STI.getFeatureBits()[RISCV::FeatureRelax]; in willForceRelocations()
DRISCVAsmBackend.cpp48 return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs; in shouldForceRelocation()
137 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in writeNopData()
350 if (!STI.getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertExtraNopBytesForCodeAlign()
353 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in shouldInsertExtraNopBytesForCodeAlign()
373 if (!STI.getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertFixupForCodeAlign()
/external/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.cpp68 if (!STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding] && !isGFX10Plus()) in AMDGPUDisassembler()
303 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) { in getInstruction()
333 if (STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]) { in getInstruction()
342 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) { in getInstruction()
364 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) { in getInstruction()
457 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in convertSDWAInst()
458 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertSDWAInst()
462 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in convertSDWAInst()
533 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertMIMGInst()
600 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10] && !IsNSA && in convertMIMGInst()
[all …]
/external/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp152 return STI.getFeatureBits()[AMDGPU::FeatureSouthernIslands]; in isSI()
156 return STI.getFeatureBits()[AMDGPU::FeatureSeaIslands]; in isCI()
160 return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; in isVI()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVSubtarget.cpp45 TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName); in initializeSubtargetDependencies()
46 RISCVFeatures::validate(TT, getFeatureBits()); in initializeSubtargetDependencies()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVSubtarget.cpp48 TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName); in initializeSubtargetDependencies()
49 RISCVFeatures::validate(TT, getFeatureBits()); in initializeSubtargetDependencies()
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyTargetTransformInfo.cpp99 TM.getSubtargetImpl(*Caller)->getFeatureBits(); in areInlineCompatible()
101 TM.getSubtargetImpl(*Callee)->getFeatureBits(); in areInlineCompatible()
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCTargetDesc.cpp36 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
68 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
80 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMStoreDeprecationInfo()
97 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMLoadDeprecationInfo()
/external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCTargetDesc.cpp41 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
68 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
80 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMRCDeprecationInfo()
92 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
104 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMStoreDeprecationInfo()
121 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMLoadDeprecationInfo()
482 return STI.getFeatureBits()[ARM::FeatureCoprocCDE0 + Coproc]; in isCDECoproc()
DARMAsmBackend.cpp205 bool HasThumb2 = STI.getFeatureBits()[ARM::FeatureThumb2]; in getRelaxedOpcode()
206 bool HasV8MBaselineOps = STI.getFeatureBits()[ARM::HasV8MBaselineOps]; in getRelaxedOpcode()
598 (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
599 !STI->getFeatureBits()[ARM::HasV8MBaselineOps] && in adjustFixupValue()
600 !STI->getFeatureBits()[ARM::HasV6MOps] && in adjustFixupValue()
673 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) { in adjustFixupValue()
698 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
699 !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) { in adjustFixupValue()
710 if (!STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCTargetDesc.cpp39 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
71 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
83 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMStoreDeprecationInfo()
100 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMLoadDeprecationInfo()
DARMAsmBackend.cpp197 bool HasThumb2 = STI.getFeatureBits()[ARM::FeatureThumb2]; in getRelaxedOpcode()
198 bool HasV8MBaselineOps = STI.getFeatureBits()[ARM::HasV8MBaselineOps]; in getRelaxedOpcode()
591 (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
592 !STI->getFeatureBits()[ARM::HasV8MBaselineOps] && in adjustFixupValue()
593 !STI->getFeatureBits()[ARM::HasV6MOps] && in adjustFixupValue()
666 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) { in adjustFixupValue()
691 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
692 !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) { in adjustFixupValue()
703 if (!STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()

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