| /external/llvm-project/llvm/unittests/MI/ |
| D | LiveIntervalTest.cpp | 104 static MachineInstr &getMI(MachineFunction &MF, unsigned At, in getMI() function
123 MachineInstr &FromInstr = getMI(MF, From, BlockNum); in testHandleMove()
124 MachineInstr &ToInstr = getMI(MF, To, BlockNum); in testHandleMove()
139 MachineInstr &FromInstr = getMI(MF, From, BlockNum); in testHandleMoveIntoNewBundle()
140 MachineInstr &ToInstr = getMI(MF, To, BlockNum); in testHandleMoveIntoNewBundle()
397 MachineInstr &MI = getMI(MF, 3, /*BlockNum=*/1); in TEST()
474 MachineInstr &UndefSubregDef = getMI(MF, 2, 1); in TEST()
495 MachineInstr &UndefSubregDef = getMI(MF, 2, 1); in TEST()
515 MachineInstr &MI = getMI(MF, 3, /*BlockNum=*/1); in TEST()
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 336 MachineInstr &MI = OpdMapper.getMI(); in applyDefaultMapping()
526 assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access"); in getVRegsMem()
562 assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access"); in createVRegs()
580 assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access"); in setVRegs()
595 assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access"); in getVRegs()
621 unsigned NumOpds = getMI().getNumOperands(); in print()
623 OS << "Mapping for " << getMI() << "\nwith " << getInstrMapping() << '\n'; in print()
643 getMI().getParent() && getMI().getParent()->getParent() in print()
644 ? getMI().getParent()->getParent()->getSubtarget().getRegisterInfo() in print()
653 OS << '(' << PrintReg(getMI().getOperand(Idx).getReg(), TRI) << ", ["; in print()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 440 MachineInstr &MI = OpdMapper.getMI(); in applyDefaultMapping()
766 OS << "Mapping for " << getMI() << "\nwith " << getInstrMapping() << '\n'; in print()
786 getMI().getParent() && getMI().getMF() in print()
787 ? getMI().getMF()->getSubtarget().getRegisterInfo() in print()
796 OS << '(' << printReg(getMI().getOperand(Idx).getReg(), TRI) << ", ["; in print()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 440 MachineInstr &MI = OpdMapper.getMI(); in applyDefaultMapping()
766 OS << "Mapping for " << getMI() << "\nwith " << getInstrMapping() << '\n'; in print()
786 getMI().getParent() && getMI().getMF() in print()
787 ? getMI().getMF()->getSubtarget().getRegisterInfo() in print()
796 OS << '(' << printReg(getMI().getOperand(Idx).getReg(), TRI) << ", ["; in print()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterBankInfo.cpp | 157 switch (OpdMapper.getMI().getOpcode()) { in applyMappingImpl()
|
| /external/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.h | 237 MachineInstr &getMI() const { return MI; } in getMI() function
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 272 MachineInstr *getMI() const { return MI; } in getMI() function in __anon1dd0dc540111::RecurrenceInstr
1580 LLVM_DEBUG(dbgs() << "\tInst: " << *(RI.getMI())); in optimizeRecurrence()
1584 TII->commuteInstruction(*(RI.getMI()), false, (*CP).first, in optimizeRecurrence()
1586 LLVM_DEBUG(dbgs() << "\t\tCommuted: " << *(RI.getMI())); in optimizeRecurrence()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 275 MachineInstr *getMI() const { return MI; } in getMI() function in __anond9421e600111::RecurrenceInstr
1578 LLVM_DEBUG(dbgs() << "\tInst: " << *(RI.getMI())); in optimizeRecurrence()
1582 TII->commuteInstruction(*(RI.getMI()), false, (*CP).first, in optimizeRecurrence()
1584 LLVM_DEBUG(dbgs() << "\t\tCommuted: " << *(RI.getMI())); in optimizeRecurrence()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.h | 328 MachineInstr &getMI() const { return MI; } in getMI() function
|
| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.h | 329 MachineInstr &getMI() const { return MI; } in getMI() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsRegisterBankInfo.cpp | 665 MachineInstr &MI = OpdMapper.getMI(); in applyMappingImpl()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterBankInfo.cpp | 372 switch (OpdMapper.getMI().getOpcode()) { in applyMappingImpl()
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsRegisterBankInfo.cpp | 729 MachineInstr &MI = OpdMapper.getMI(); in applyMappingImpl()
|
| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64RegisterBankInfo.cpp | 380 switch (OpdMapper.getMI().getOpcode()) { in applyMappingImpl()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | GVN.cpp | 187 static AvailableValue getMI(MemIntrinsic *MI, unsigned Offset = 0) { in getMI() function
911 Res = AvailableValue::getMI(DepMI, Offset); in AnalyzeLoadAvailability()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1412 MachineInstr &MI = OpdMapper.getMI(); in applyMappingSBufferLoad()
1531 MachineInstr &MI = OpdMapper.getMI(); in applyMappingBFEIntrinsic()
1671 OpdMapper.getMI().getOperand(OpIdx).setReg(SrcReg[0]); in substituteSimpleCopyRegs()
2108 MachineInstr &MI = OpdMapper.getMI(); in applyMappingImpl()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | GVN.cpp | 146 static AvailableValue getMI(MemIntrinsic *MI, unsigned Offset = 0) { in getMI() function
1272 Res = AvailableValue::getMI(DepMI, Offset); in AnalyzeLoadAvailability()
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| /external/llvm-project/llvm/lib/Transforms/Scalar/ |
| D | GVN.cpp | 202 static AvailableValue getMI(MemIntrinsic *MI, unsigned Offset = 0) { in getMI() function
1011 Res = AvailableValue::getMI(DepMI, Offset); in AnalyzeLoadAvailability()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1253 OpdMapper.getMI().getOperand(OpIdx).setReg(SrcReg[0]); in substituteSimpleCopyRegs()
1470 MachineInstr &MI = OpdMapper.getMI(); in applyMappingImpl()
|