/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | MachineIRBuilder.cpp | 166 assert(Res.getLLTTy(*getMRI()).isPointer() && "expected ptr dst type"); in buildDynStackAlloc() 168 Res.addDefToMIB(*getMRI(), MIB); in buildDynStackAlloc() 176 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildFrameIndex() 178 Res.addDefToMIB(*getMRI(), MIB); in buildFrameIndex() 185 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildGlobalValue() 186 assert(Res.getLLTTy(*getMRI()).getAddressSpace() == in buildGlobalValue() 191 Res.addDefToMIB(*getMRI(), MIB); in buildGlobalValue() 217 assert(Res.getLLTTy(*getMRI()).isPointer() && in buildPtrAdd() 218 Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch"); in buildPtrAdd() 219 assert(Op1.getLLTTy(*getMRI()).isScalar() && "invalid offset type"); in buildPtrAdd() [all …]
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D | CSEMIRBuilder.cpp | 65 B.addNodeIDRegType(Op.getLLTTy(*getMRI())); in profileDstOp() 161 SrcOps[1].getReg(), *getMRI())) in buildInstr() 172 ConstantFoldExtOp(Opc, Src0.getReg(), Src1.getImm(), *getMRI())) in buildInstr() 190 GISelInstProfileBuilder ProfBuilder(ID, *getMRI()); in buildInstr() 211 LLT Ty = Res.getLLTTy(*getMRI()); in buildConstant() 216 GISelInstProfileBuilder ProfBuilder(ID, *getMRI()); in buildConstant() 238 LLT Ty = Res.getLLTTy(*getMRI()); in buildFConstant() 243 GISelInstProfileBuilder ProfBuilder(ID, *getMRI()); in buildFConstant()
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D | CallLowering.cpp | 135 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in packRegs() 237 MIRBuilder.getMRI()->createGenericVirtualRegister(NewLLT); in handleAssignments() 328 MIRBuilder.getMRI()->createGenericVirtualRegister(VATy); in handleAssignments()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | MachineIRBuilder.cpp | 129 assert(Res.getLLTTy(*getMRI()).isPointer() && "expected ptr dst type"); in buildDynStackAlloc() 131 Res.addDefToMIB(*getMRI(), MIB); in buildDynStackAlloc() 139 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildFrameIndex() 141 Res.addDefToMIB(*getMRI(), MIB); in buildFrameIndex() 148 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildGlobalValue() 149 assert(Res.getLLTTy(*getMRI()).getAddressSpace() == in buildGlobalValue() 154 Res.addDefToMIB(*getMRI(), MIB); in buildGlobalValue() 185 assert(Res.getLLTTy(*getMRI()).getScalarType().isPointer() && in buildPtrAdd() 186 Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch"); in buildPtrAdd() 187 assert(Op1.getLLTTy(*getMRI()).getScalarType().isScalar() && "invalid offset type"); in buildPtrAdd() [all …]
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D | CSEMIRBuilder.cpp | 77 B.addNodeIDRegType(Op.getLLTTy(*getMRI())); in profileDstOp() 191 SrcOps[1].getReg(), *getMRI())) in buildInstr() 202 ConstantFoldExtOp(Opc, Src0.getReg(), Src1.getImm(), *getMRI())) in buildInstr() 220 GISelInstProfileBuilder ProfBuilder(ID, *getMRI()); in buildInstr() 241 LLT Ty = Res.getLLTTy(*getMRI()); in buildConstant() 246 GISelInstProfileBuilder ProfBuilder(ID, *getMRI()); in buildConstant() 268 LLT Ty = Res.getLLTTy(*getMRI()); in buildFConstant() 273 GISelInstProfileBuilder ProfBuilder(ID, *getMRI()); in buildFConstant()
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D | CallLowering.cpp | 173 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in packRegs() 277 MIRBuilder.getMRI()->createGenericVirtualRegister(NewLLT); in handleAssignments() 398 MIRBuilder.getMRI()->createGenericVirtualRegister(VATy); in handleAssignments()
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D | InlineAsmLowering.cpp | 244 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAnyextOrCopy() 287 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in lowerInlineAsm()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | ConstantFoldingMIRBuilder.h | 53 ConstantFoldBinOp(Opc, Src0.getReg(), Src1.getReg(), *getMRI())) 64 ConstantFoldExtOp(Opc, Src0.getReg(), Src1.getImm(), *getMRI()))
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D | MachineIRBuilder.h | 271 MachineRegisterInfo *getMRI() { return State.MRI; } in getMRI() function 272 const MachineRegisterInfo *getMRI() const { return State.MRI; } in getMRI() function 1342 auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1); in buildNot()
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D | RegisterBankInfo.h | 334 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI() function
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/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
D | ConstantFoldingMIRBuilder.h | 53 ConstantFoldBinOp(Opc, Src0.getReg(), Src1.getReg(), *getMRI())) 64 ConstantFoldExtOp(Opc, Src0.getReg(), Src1.getImm(), *getMRI()))
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D | RegisterBankInfo.h | 335 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI() function
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D | MachineIRBuilder.h | 283 MachineRegisterInfo *getMRI() { return State.MRI; } in getMRI() function 284 const MachineRegisterInfo *getMRI() const { return State.MRI; } in getMRI() function 1513 auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1); in buildNot()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPUCallLowering.cpp | 344 MachineRegisterInfo &MRI = *B.getMRI(); in splitToValueTypes() 387 MachineRegisterInfo &MRI = *B.getMRI(); in unpackRegsToOrigType() 427 MachineRegisterInfo *MRI = B.getMRI(); in lowerReturnVal() 524 Register PtrReg = B.getMRI()->createGenericVirtualRegister(PtrTy); in lowerParameter() 669 MachineRegisterInfo &MRI = *B.getMRI(); in mergeVectorRegsToResultRegs() 709 MachineRegisterInfo &MRI = *B.getMRI(); in packSplitRegsToOrigType()
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D | AMDGPURegisterBankInfo.cpp | 666 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping() 1332 MachineRegisterInfo *MRI = B.getMRI(); in setBufferOffsets() 1342 B.getMRI()->setRegBank(VOffsetReg, AMDGPU::VGPRRegBank); in setBufferOffsets() 1343 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets() 1360 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets() 1368 B.getMRI()->setRegBank(VOffsetReg, AMDGPU::VGPRRegBank); in setBufferOffsets() 1402 B.getMRI()->setRegBank(VOffsetReg, AMDGPU::VGPRRegBank); in setBufferOffsets() 1406 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets() 1413 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingSBufferLoad() 1468 B.getMRI()->setRegBank(VIndex, AMDGPU::VGPRRegBank); in applyMappingSBufferLoad() [all …]
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D | AMDGPULegalizerInfo.cpp | 1637 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeCustom() 2233 B.getMRI()->createGenericVirtualRegister(ConstPtrTy); in buildPCRelGlobalAddress() 2244 B.getMRI()->setRegClass(PCReg, &AMDGPU::SReg_64RegClass); in buildPCRelGlobalAddress() 2367 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeLoad() 2495 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlog() 2511 LLT Ty = B.getMRI()->getType(Dst); in legalizeFExp() 2526 LLT Ty = B.getMRI()->getType(Dst); in legalizeFPow() 3494 AMDGPU::getBaseWithConstantOffset(*B.getMRI(), OrigOffset); in splitBufferOffsets() 3586 MachineRegisterInfo *MRI = B.getMRI(); in fixStoreSourceType() 3772 LoadDstReg = B.getMRI()->createGenericVirtualRegister(S32); in legalizeBufferLoad() [all …]
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D | SIPeepholeSDWA.cpp | 128 MachineRegisterInfo *getMRI() const { in getMRI() function in __anon1d4932070111::SDWAOperand 358 MachineOperand *PotentialMO = findSingleRegUse(getReplacedOperand(), getMRI()); in potentialToConvert() 442 MachineRegisterInfo *MRI = getMRI(); in potentialToConvert() 496 getMRI()->clearKillFlags(MO.getReg()); in convertToSDWA()
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D | SIMachineScheduler.h | 455 MachineRegisterInfo *getMRI() { return &MRI; } in getMRI() function
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D | AMDGPUPostLegalizerCombiner.cpp | 41 : B(B), MF(B.getMF()), MRI(*B.getMRI()), Helper(Helper){}; in AMDGPUPostLegalizerCombinerHelper()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIPeepholeSDWA.cpp | 128 MachineRegisterInfo *getMRI() const { in getMRI() function in __anon27409b7b0111::SDWAOperand 358 MachineOperand *PotentialMO = findSingleRegUse(getReplacedOperand(), getMRI()); in potentialToConvert() 442 MachineRegisterInfo *MRI = getMRI(); in potentialToConvert() 496 getMRI()->clearKillFlags(MO.getReg()); in convertToSDWA()
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D | SIMachineScheduler.h | 458 MachineRegisterInfo *getMRI() { return &MRI; } in getMRI() function
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/external/llvm/lib/Target/AMDGPU/ |
D | SIMachineScheduler.h | 451 MachineRegisterInfo *getMRI() { return &MRI; } in getMRI() function
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D | SIMachineScheduler.cpp | 310 MachineRegisterInfo *MRI = DAG->getMRI(); in initRegPressure() 1607 PSetIterator PSetI = DAG->getMRI()->getPressureSets(Reg); in checkRegUsageImpact() 1617 PSetIterator PSetI = DAG->getMRI()->getPressureSets(Reg); in checkRegUsageImpact()
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/external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
D | AArch64InstructionSelector.cpp | 1015 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect() 1391 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit() 1444 AndInst.getOperand(2).getReg(), *MIB.getMRI()); in tryOptAndIntoCompareBranch() 1461 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ() 1508 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptCompareBranchFedByICmp() 3669 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitExtractVectorElt() 4153 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitCSetForFCmp() 4186 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitFPCompare() 4337 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptSelect() 4432 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryFoldIntegerCompare() [all …]
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D | AArch64LegalizerInfo.cpp | 699 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom() 734 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeVectorTrunc()
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