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Searched refs:getMachineOpValue (Results 1 – 25 of 57) sorted by relevance

123

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding()
196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding()
206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding()
208 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding()
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
[all …]
/external/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding()
196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding()
206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding()
208 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding()
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenMCCodeEmitter.inc4511 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4515 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4527 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4531 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4535 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4551 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4555 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4563 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4567 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4572 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
[all …]
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp52 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
137 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
151 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding()
161 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding()
171 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding()
173 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding()
182 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc2825 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2830 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2865 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2870 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2875 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2883 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2888 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2903 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2923 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2936 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp47 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
59 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
72 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
85 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
97 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
111 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding()
115 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
129 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding()
133 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits; in getMemRIXEncoding()
147 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 12; in getMemRIX16Encoding()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp49 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
63 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
76 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
89 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
102 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
111 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
126 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
155 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding()
159 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
173 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding()
[all …]
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp96 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
221 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding()
225 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
240 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding()
244 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits; in getMemRIXEncoding()
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenMCCodeEmitter.inc5511 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5520 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5545 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5549 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5554 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5559 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5570 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5574 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5579 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5588 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenMCCodeEmitter.inc2512 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2521 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2543 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2548 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2562 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2567 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2572 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2609 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2614 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2674 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
[all …]
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp560 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
760 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
786 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16; in getMemEncoding()
787 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
801 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
803 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
815 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
817 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
829 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
831 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp57 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
106 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
116 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
148 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue()
183 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
196 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
208 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
/external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp539 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
734 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
760 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
762 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
776 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
778 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
790 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
792 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
804 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
806 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp539 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
747 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
773 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
775 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
789 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
791 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
803 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
805 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
817 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
819 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
/external/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
115 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
124 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
155 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue()
190 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
203 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
216 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
115 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
124 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
155 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue()
190 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
203 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
216 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
/external/llvm-project/llvm/lib/Target/VE/MCTargetDesc/
DVEMCCodeEmitter.cpp64 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
99 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in VEMCCodeEmitter
131 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
144 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
154 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
/external/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiMCCodeEmitter.cpp58 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
112 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::__anon8ddaab120111::LanaiMCCodeEmitter
215 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
286 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
296 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getCallTargetOpValue()
309 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiMCCodeEmitter.cpp57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
109 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
/external/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiMCCodeEmitter.cpp57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
109 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
254 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding()
257 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
86 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp64 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
304 OS.write((uint8_t)getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), in encodeInstruction()
359 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding()
451 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
DR600MCCodeEmitter.cpp53 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
171 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
/external/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
87 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter

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