| /external/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.cpp | 163 const char* AMDGPUDisassembler::getRegClassName(unsigned RegClassID) const { in getRegClassName() function in AMDGPUDisassembler
165 getRegClassName(&AMDGPUMCRegisterClasses[RegClassID]); in getRegClassName()
188 return errOperand(Val, Twine(getRegClassName(RegClassID)) + in createRegOperand()
224 *CommentStream << "Warning: " << getRegClassName(SRegClassID) in createSRegOperand()
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| D | AMDGPUDisassembler.h | 44 const char* getRegClassName(unsigned RegClassID) const;
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| /external/llvm/lib/CodeGen/ |
| D | LiveStackAnalysis.cpp | 84 OS << " [" << TRI->getRegClassName(RC) << "]\n"; in print()
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| D | RegAllocBase.cpp | 103 << TRI->getRegClassName(MRI->getRegClass(VirtReg->reg)) in allocatePhysRegs()
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| D | VirtRegMap.cpp | 125 << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
133 << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
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| D | RegisterClassInfo.cpp | 143 dbgs() << "AllocationOrder(" << TRI->getRegClassName(RC) << ") = ["; in compute()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | LiveStacks.cpp | 84 OS << " [" << TRI->getRegClassName(RC) << "]\n"; in print()
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| D | RegAllocBase.cpp | 107 << TRI->getRegClassName(MRI->getRegClass(VirtReg->reg())) in allocatePhysRegs()
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| D | RegisterClassInfo.cpp | 156 dbgs() << "AllocationOrder(" << TRI->getRegClassName(RC) << ") = ["; in compute()
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| D | VirtRegMap.cpp | 144 << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
152 << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | LiveStacks.cpp | 84 OS << " [" << TRI->getRegClassName(RC) << "]\n"; in print()
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| D | RegAllocBase.cpp | 107 << TRI->getRegClassName(MRI->getRegClass(VirtReg->reg)) in allocatePhysRegs()
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| D | RegisterClassInfo.cpp | 156 dbgs() << "AllocationOrder(" << TRI->getRegClassName(RC) << ") = ["; in compute()
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| D | VirtRegMap.cpp | 144 << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
152 << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBank.cpp | 104 OS << TRI->getRegClassName(&RC); in print()
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| D | RegisterBankInfo.cpp | 95 DEBUG(dbgs() << "Examine: " << TRI.getRegClassName(&CurRC) in addRegBankCoverage()
116 DEBUG(dbgs() << TRI.getRegClassName(TRI.getRegClass(SubRCId)) << ", "); in addRegBankCoverage()
152 DEBUG(dbgs() << TRI.getRegClassName(SubRC) << ", "); in addRegBankCoverage()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBank.cpp | 111 OS << TRI->getRegClassName(&RC); in print()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBank.cpp | 111 OS << TRI->getRegClassName(&RC); in print()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.h | 58 const char* getRegClassName(unsigned RegClassID) const;
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| D | AMDGPUDisassembler.cpp | 593 const char* AMDGPUDisassembler::getRegClassName(unsigned RegClassID) const { in getRegClassName() function in AMDGPUDisassembler
595 getRegClassName(&AMDGPUMCRegisterClasses[RegClassID]); in getRegClassName()
618 return errOperand(Val, Twine(getRegClassName(RegClassID)) + in createRegOperand()
656 *CommentStream << "Warning: " << getRegClassName(SRegClassID) in createSRegOperand()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 655 const char *getRegClassName(const TargetRegisterClass *Class) const { in getRegClassName() function
656 return MCRegisterInfo::getRegClassName(Class->MC); in getRegClassName()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.h | 59 const char* getRegClassName(unsigned RegClassID) const;
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 677 const char *getRegClassName(const TargetRegisterClass *Class) const { in getRegClassName() function
678 return MCRegisterInfo::getRegClassName(Class->MC); in getRegClassName()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 696 const char *getRegClassName(const TargetRegisterClass *Class) const { in getRegClassName() function
697 return MCRegisterInfo::getRegClassName(Class->MC); in getRegClassName()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 97 dbgs() << "Register class: " << getRegClassName(RC) << "\n"; in getCallerSavedRegs()
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