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Searched refs:getRegInfo (Results 1 – 25 of 845) sorted by relevance

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/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp123 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2); in getCalleeSavedRegs()
383 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
407 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
415 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
432 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
440 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
504 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
516 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
549 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
561 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
[all …]
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/
DRegisterAliasingTest.cpp28 const auto &RegInfo = State.getRegInfo(); in TEST_F()
44 const auto &RegInfo = State.getRegInfo(); in TEST_F()
63 const auto &RegInfo = State.getRegInfo(); in TEST_F()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMachineFunction.cpp50 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg()
68 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in initGlobalBaseReg()
81 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg()
109 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg()
144 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg()
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/
DRegisterAliasingTest.cpp29 const auto &RegInfo = State.getRegInfo(); in TEST_F()
45 const auto &RegInfo = State.getRegInfo(); in TEST_F()
62 const auto &RegInfo = State.getRegInfo(); in TEST_F()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsMachineFunction.cpp50 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg()
68 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in initGlobalBaseReg()
80 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg()
108 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg()
143 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg()
/external/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp65 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
156 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
175 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
314 MF.getRegInfo().addLiveIn(WorkGroupIDSGPR); in emitDebuggerPrologue()
320 MF.getRegInfo().createVirtualRegister(&AMDGPU::VGPR_32RegClass); in emitDebuggerPrologue()
331 MF.getRegInfo().addLiveIn(WorkItemIDVGPR); in emitDebuggerPrologue()
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXPeephole.cpp82 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate()
107 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal()
146 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXPeephole.cpp82 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate()
107 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal()
146 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction()
/external/llvm/lib/Target/NVPTX/
DNVPTXPeephole.cpp83 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate()
108 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal()
147 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp163 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2); in getCalleeSavedRegs()
529 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
558 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
566 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
583 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
591 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
657 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
669 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
702 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
714 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
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/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyFixBrTableDefaults.cpp61 auto ExtMI = MF.getRegInfo().getVRegDef(MI.getOperand(0).getReg()); in fixBrTableIndex()
70 MF.getRegInfo().createVirtualRegister(&WebAssembly::I32RegClass); in fixBrTableIndex()
122 MachineRegisterInfo &MRI = MF.getRegInfo(); in fixBrTableDefault()
DWebAssemblyRegNumbering.cpp67 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
87 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs(); in runOnMachineFunction()
DWebAssemblyInstrInfo.cpp62 auto &MRI = MBB.getParent()->getRegInfo(); in copyPhysReg()
200 auto &MRI = MF.getRegInfo(); in insertBranch()
230 auto &MRI = MF.getRegInfo(); in reverseBranchCondition()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp180 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2) && in getCalleeSavedRegs()
511 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
600 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
608 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
617 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
625 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
721 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
733 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
766 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
778 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRegNumbering.cpp67 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
87 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs(); in runOnMachineFunction()
DWebAssemblyInstrInfo.cpp62 auto &MRI = MBB.getParent()->getRegInfo(); in copyPhysReg()
196 auto &MRI = MF.getRegInfo(); in insertBranch()
226 auto &MRI = MF.getRegInfo(); in reverseBranchCondition()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyRegNumbering.cpp63 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
90 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs(); in runOnMachineFunction()
DWebAssemblyFrameLowering.cpp87 MachineRegisterInfo &MRI = MF.getRegInfo(); in writeSPToMemory()
133 auto &MRI = MF.getRegInfo(); in emitPrologue()
186 auto &MRI = MF.getRegInfo(); in emitEpilogue()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLivePhysRegs.cpp174 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs()
245 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns()
256 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns()
277 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags()
DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt()
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock()
243 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
DTargetFrameLoweringImpl.cpp94 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves()
119 const MachineRegisterInfo &MRI = MF.getRegInfo(); in determineCalleeSaves()
/external/llvm-project/llvm/lib/CodeGen/
DLiveIntervalCalc.cpp53 const MachineRegisterInfo *MRI = getRegInfo(); in calculate()
134 const MachineRegisterInfo *MRI = getRegInfo(); in createDeadDefs()
147 const MachineRegisterInfo *MRI = getRegInfo(); in extendToUses()
DLivePhysRegs.cpp174 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs()
245 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns()
256 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns()
277 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags()
DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt()
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock()
243 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
DTargetFrameLoweringImpl.cpp96 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves()
121 const MachineRegisterInfo &MRI = MF.getRegInfo(); in determineCalleeSaves()

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