| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 646 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; } in getRegUnit() function
647 const RegUnit &getRegUnit(unsigned RUID) const { return RegUnits[RUID]; } in getRegUnit() function
670 Weight += getRegUnit(*I).Weight; in getRegUnitSetWeight()
683 getRegUnit(RUID).Weight += Inc; in increaseRegUnitWeight()
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| D | RegisterInfoEmitter.cpp | 220 if (RegBank.getRegUnit(UnitIdx).Weight > 1) in EmitRegUnitPressure()
232 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure()
329 OS << PSetsSeqs.get(PSets[RegBank.getRegUnit(UnitIdx).RegClassUnitSetsIdx]) in EmitRegUnitPressure()
971 ArrayRef<const CodeGenRegister*> Roots = RegBank.getRegUnit(i).getRoots(); in runMCDesc()
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| /external/llvm-project/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 712 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; } in getRegUnit() function
713 const RegUnit &getRegUnit(unsigned RUID) const { return RegUnits[RUID]; } in getRegUnit() function
743 Weight += getRegUnit(*I).Weight; in getRegUnitSetWeight()
757 getRegUnit(RUID).Weight += Inc; in increaseRegUnitWeight()
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| D | RegisterInfoEmitter.cpp | 238 if (RegBank.getRegUnit(UnitIdx).Weight > 1) in EmitRegUnitPressure()
250 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure()
348 OS << PSetsSeqs.get(PSets[RegBank.getRegUnit(UnitIdx).RegClassUnitSetsIdx]) in EmitRegUnitPressure()
1032 ArrayRef<const CodeGenRegister*> Roots = RegBank.getRegUnit(i).getRoots(); in runMCDesc()
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| D | CodeGenRegisters.cpp | 596 Weight += RegBank.getRegUnit(*I).Weight; in getWeight()
1095 const RegUnit &RU = RegBank.getRegUnit(*UnitI); in buildRegUnitSet()
1679 if (!RegBank.getRegUnit(*UnitI).Artificial) { in computeUberWeights()
1680 unsigned UWeight = RegBank.getRegUnit(*UnitI).Weight; in computeUberWeights()
1766 if (!RegBank.getRegUnit(AdjustUnit).Artificial) in normalizeWeight()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 261 LiveRange &M0Range = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::M0, TRI)); in mergeRead2Pair()
329 LiveRange &M0Range = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::M0, TRI)); in mergeWrite2Pair()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIOptimizeExecMaskingPreRA.cpp | 101 if (isDefBetween(LIS->getRegUnit(*UI), AndIdx, SelIdx)) in isDefBetween()
286 LiveRange &RegUnit = LIS->getRegUnit(*UI); in optimizeElseBranch()
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| D | SIWholeQuadMode.cpp | 358 LiveRange &LR = LIS->getRegUnit(*RegUnit); in markInstructionUses()
635 LIS->getRegUnit(*MCRegUnitIterator(MCRegister::from(AMDGPU::SCC), TRI)); in prepareInsertion()
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| /external/llvm/lib/CodeGen/ |
| D | LiveRegMatrix.cpp | 165 const LiveRange &UnitRange = LIS->getRegUnit(Unit); in checkRegUnitInterference()
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| D | InterferenceCache.cpp | 108 RegUnits.back().Fixed = &LIS->getRegUnit(*Units); in reset()
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| D | LiveIntervalAnalysis.cpp | 139 getRegUnit(i); in runOnMachineFunction()
668 const LiveRange &RURange = getRegUnit(*Units); in addKillFlags()
928 return &LIS.getRegUnit(Unit); in getRegUnitLI()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | LiveRegMatrix.cpp | 172 const LiveRange &UnitRange = LIS->getRegUnit(Unit); in checkRegUnitInterference()
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| D | InterferenceCache.cpp | 119 RegUnits.back().Fixed = &LIS->getRegUnit(*Units); in reset()
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| D | LiveIntervals.cpp | 148 getRegUnit(i); in runOnMachineFunction()
714 const LiveRange &RURange = getRegUnit(*Unit); in addKillFlags()
977 return &LIS.getRegUnit(Unit); in getRegUnitLI()
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| D | VirtRegMap.cpp | 476 const LiveRange &UnitRange = LIS->getRegUnit(*Unit); in subRegLiveThrough()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | LiveRegMatrix.cpp | 172 const LiveRange &UnitRange = LIS->getRegUnit(Unit); in checkRegUnitInterference()
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| D | InterferenceCache.cpp | 115 RegUnits.back().Fixed = &LIS->getRegUnit(*Units); in reset()
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| D | LiveIntervals.cpp | 146 getRegUnit(i); in runOnMachineFunction()
721 const LiveRange &RURange = getRegUnit(*Unit); in addKillFlags()
982 return &LIS.getRegUnit(Unit); in getRegUnitLI()
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| /external/llvm/include/llvm/CodeGen/ |
| D | LiveIntervalAnalysis.h | 374 LiveRange &getRegUnit(unsigned Unit) { in getRegUnit() function
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 322 LiveRange &AddendSrcRange = LIS->getRegUnit(Unit); in processBlock()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | LiveIntervals.h | 393 LiveRange &getRegUnit(unsigned Unit) { in getRegUnit() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 323 LiveRange &AddendSrcRange = LIS->getRegUnit(Unit); in processBlock()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 323 LiveRange &AddendSrcRange = LIS->getRegUnit(Unit); in processBlock()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | LiveIntervals.h | 394 LiveRange &getRegUnit(unsigned Unit) { in getRegUnit() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIWholeQuadMode.cpp | 288 LiveRange &LR = LIS->getRegUnit(*RegUnit); in markInstructionUses()
586 LiveRange &LR = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::SCC, TRI)); in prepareInsertion()
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