Searched refs:gs_state (Results 1 – 9 of 9) sorted by relevance
| /external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_compute.c | 86 .gs_state = true, in cs_program_emit()
|
| D | fd6_draw.c | 363 .gs_state = true, in fd6_clear_lrz()
|
| D | fd6_program.c | 242 .gs_state = true, in setup_config_stateobj()
|
| D | fd6_emit.c | 1158 .gs_state = true, in fd6_emit_restore()
|
| /external/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 4595 const struct gfx9_gs_info *gs_state = &gs->info.gs_ring_info; in radv_pipeline_generate_hw_gs() local
4632 gs_state->vgt_esgs_ring_itemsize); in radv_pipeline_generate_hw_gs()
4649 radeon_emit(cs, gs->config.rsrc2 | S_00B22C_LDS_SIZE(gs_state->lds_size)); in radv_pipeline_generate_hw_gs()
4651 radeon_set_context_reg(ctx_cs, R_028A44_VGT_GS_ONCHIP_CNTL, gs_state->vgt_gs_onchip_cntl); in radv_pipeline_generate_hw_gs()
4652 …radeon_set_context_reg(ctx_cs, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, gs_state->vgt_gs_max_prims_… in radv_pipeline_generate_hw_gs()
5015 const struct gfx9_gs_info *gs_state = in gfx10_pipeline_generate_ge_cntl() local
5017 unsigned vgt_gs_onchip_cntl = gs_state->vgt_gs_onchip_cntl; in gfx10_pipeline_generate_ge_cntl()
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | genX_state_upload.c | 2750 static const struct brw_tracked_state genX(gs_state) = {
5621 &genX(gs_state),
5688 &genX(gs_state),
5779 &genX(gs_state),
5868 &genX(gs_state),
|
| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_pipeline.c | 1466 .gs_state = true, in tu6_emit_program()
|
| D | tu_clear_blit.c | 419 .gs_state = true, in r3d_common()
|
| D | tu_cmd_buffer.c | 716 .gs_state = true, in tu6_init_hw()
|