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Searched refs:hasSSE41 (Results 1 – 24 of 24) sorted by relevance

/external/llvm/lib/Target/X86/
DX86Subtarget.h386 bool hasSSE41() const { return X86SSELevel >= SSE41; } in hasSSE41() function
DX86TargetTransformInfo.cpp282 if (ISD == ISD::SDIV && LT.second == MVT::v4i32 && ST->hasSSE41()) in getArithmeticInstrCost()
296 (VT == MVT::v4i32 && ST->hasSSE41())) in getArithmeticInstrCost()
408 !ST->hasSSE41()) in getArithmeticInstrCost()
480 if (ST->hasSSE41()) in getShuffleCost()
860 if (ST->hasSSE41()) { in getCastInstrCost()
DX86ISelLowering.cpp879 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE41()) { in X86TargetLowering()
5276 if (Subtarget.hasSSE41()) { in LowerBuildVectorv16i8()
5429 if (!Subtarget.hasSSE41()) in LowerBuildVectorv4x32()
6847 if (Subtarget.hasSSE41()) { in LowerBUILD_VECTOR()
8093 if (Subtarget.hasSSE41()) { in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
8437 if (Subtarget.hasSSE41()) in lowerVectorShuffleAsElementInsertion()
8963 if (Subtarget.hasSSE41()) in lowerV2F64VectorShuffle()
9054 bool IsBlendSupported = Subtarget.hasSSE41(); in lowerV2I64VectorShuffle()
9251 if (Subtarget.hasSSE41()) { in lowerV4F32VectorShuffle()
9337 bool IsBlendSupported = Subtarget.hasSSE41(); in lowerV4I32VectorShuffle()
[all …]
DX86InstrInfo.td786 def HasSSE41 : Predicate<"Subtarget->hasSSE41()">;
787 def NoSSE41 : Predicate<"!Subtarget->hasSSE41()">;
788 def UseSSE41 : Predicate<"Subtarget->hasSSE41() && !Subtarget->hasAVX()">;
DX86FastISel.cpp351 bool HasSSE41 = Subtarget->hasSSE41(); in X86FastEmitLoad()
/external/llvm-project/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp484 if (ISD == ISD::SDIV && LT.second == MVT::v4i32 && ST->hasSSE41()) in getArithmeticInstrCost()
486 if (ISD == ISD::SREM && LT.second == MVT::v4i32 && ST->hasSSE41()) in getArithmeticInstrCost()
875 if (ST->hasSSE41()) in getArithmeticInstrCost()
1319 if (ST->hasSSE41()) in getShuffleCost()
2070 if (ST->hasSSE41()) { in getCastInstrCost()
2128 if ((ST->hasSSE41() && MTy.getScalarSizeInBits() == 32) || in getCmpSelInstrCost()
2265 if (ST->hasSSE41()) in getCmpSelInstrCost()
2853 if (ST->hasSSE41()) in getTypeBasedIntrinsicInstrCost()
3068 (MScalarTy.isInteger() && ST->hasSSE41())) in getVectorInstrCost()
3072 if (MScalarTy == MVT::f32 && ST->hasSSE41() && in getVectorInstrCost()
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DX86Subtarget.h624 bool hasSSE41() const { return X86SSELevel >= SSE41; } in hasSSE41() function
DX86PartialReduction.cpp89 if (ST->hasSSE41()) { in tryMAddReplacement()
DX86LegalizerInfo.cpp356 if (!Subtarget.hasSSE41()) in setLegalizerInfoSSE41()
DX86ISelLowering.cpp1078 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE41()) { in X86TargetLowering()
2338 return (Align < 16 || !Subtarget.hasSSE41()); in allowsMisalignedMemoryAccesses()
7975 ((VT == MVT::v16i8 || VT == MVT::v4i32) && Subtarget.hasSSE41())) && in LowerBuildVectorAsInsert()
8014 if (NumNonZero > 8 && !Subtarget.hasSSE41()) in LowerBuildVectorv16i8()
8018 if (Subtarget.hasSSE41()) in LowerBuildVectorv16i8()
8080 if (NumNonZero > 4 && !Subtarget.hasSSE41()) in LowerBuildVectorv8i16()
8176 if (!Subtarget.hasSSE41()) in LowerBuildVectorv4x32()
9927 } else if (Subtarget.hasSSE41()) { in createVariablePermute()
10457 if (Subtarget.hasSSE41()) { in LowerBUILD_VECTOR()
11243 if ((Subtarget.hasSSE41() || VT == MVT::v2i64 || VT == MVT::v2f64) && in matchShuffleWithUNPCK()
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DX86InstrInfo.td883 def HasSSE41 : Predicate<"Subtarget->hasSSE41()">;
884 def NoSSE41 : Predicate<"!Subtarget->hasSSE41()">;
885 def UseSSE41 : Predicate<"Subtarget->hasSSE41() && !Subtarget->hasAVX()">;
1025 "!Subtarget->hasSSE41()">;
DX86ISelDAGToDAG.cpp489 return Subtarget->hasSSE41(); in useNonTemporalLoad()
969 assert(Subtarget->hasSSE41() && "Expected SSE4.1 support!"); in PreprocessISelDAG()
DX86FastISel.cpp320 bool HasSSE41 = Subtarget->hasSSE41(); in X86FastEmitLoad()
DX86InstrInfo.cpp2137 if (Subtarget.hasSSE41()) { in commuteInstructionImpl()
2521 if (Subtarget.hasSSE41()) in findCommutedOpIndices()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Subtarget.h588 bool hasSSE41() const { return X86SSELevel >= SSE41; } in hasSSE41() function
DX86TargetTransformInfo.cpp440 if (ISD == ISD::SDIV && LT.second == MVT::v4i32 && ST->hasSSE41()) in getArithmeticInstrCost()
442 if (ISD == ISD::SREM && LT.second == MVT::v4i32 && ST->hasSSE41()) in getArithmeticInstrCost()
802 if (ST->hasSSE41()) in getArithmeticInstrCost()
1194 if (ST->hasSSE41()) in getShuffleCost()
1688 if (ST->hasSSE41()) { in getCastInstrCost()
1738 if ((ST->hasSSE41() && MTy.getScalarSizeInBits() == 32) || in getCmpSelInstrCost()
1869 if (ST->hasSSE41()) in getCmpSelInstrCost()
2944 if (ST->hasSSE41()) in getMinMaxReductionCost()
2973 if (ST->hasSSE41()) in getMinMaxReductionCost()
DX86LegalizerInfo.cpp361 if (!Subtarget.hasSSE41()) in setLegalizerInfoSSE41()
DX86ISelLowering.cpp1069 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE41()) { in X86TargetLowering()
2335 return (Align < 16 || !Subtarget.hasSSE41()); in allowsMisalignedMemoryAccesses()
7685 ((VT == MVT::v16i8 || VT == MVT::v4i32) && Subtarget.hasSSE41())) && in LowerBuildVectorAsInsert()
7724 if (NumNonZero > 8 && !Subtarget.hasSSE41()) in LowerBuildVectorv16i8()
7728 if (Subtarget.hasSSE41()) in LowerBuildVectorv16i8()
7789 if (NumNonZero > 4 && !Subtarget.hasSSE41()) in LowerBuildVectorv8i16()
7885 if (!Subtarget.hasSSE41()) in LowerBuildVectorv4x32()
9641 } else if (Subtarget.hasSSE41()) { in createVariablePermute()
10171 if (Subtarget.hasSSE41()) { in LowerBUILD_VECTOR()
10860 if ((Subtarget.hasSSE41() || VT == MVT::v2i64 || VT == MVT::v2f64) && in matchShuffleWithUNPCK()
[all …]
DX86InstrInfo.td857 def HasSSE41 : Predicate<"Subtarget->hasSSE41()">;
858 def NoSSE41 : Predicate<"!Subtarget->hasSSE41()">;
859 def UseSSE41 : Predicate<"Subtarget->hasSSE41() && !Subtarget->hasAVX()">;
989 "!Subtarget->hasSSE41()">;
DX86ISelDAGToDAG.cpp502 return Subtarget->hasSSE41(); in useNonTemporalLoad()
4524 assert(Subtarget->hasSSE41() && "Expected SSE4.1 support!"); in Select()
DX86FastISel.cpp321 bool HasSSE41 = Subtarget->hasSSE41(); in X86FastEmitLoad()
DX86InstrInfo.cpp1654 if (Subtarget.hasSSE41()) { in commuteInstructionImpl()
2038 if (Subtarget.hasSSE41()) in findCommutedOpIndices()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc1563 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1576 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1599 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1641 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1654 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1688 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2891 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2904 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2927 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2969 if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
[all …]
DX86GenGlobalISel.inc181 if (Subtarget->hasSSE41() && !Subtarget->hasAVX())
394 if (shouldOptForSize(MF) || !Subtarget->hasSSE41())