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Searched refs:hasVLX (Results 1 – 25 of 29) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc45 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
51 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
60 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
63 if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
81 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
87 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
96 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
99 if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
117 if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
123 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86LegalizerInfo.cpp478 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512()
494 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512DQ()
518 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512BW()
DX86Subtarget.h730 bool hasVLX() const { return HasVLX; } in hasVLX() function
788 return hasAVX512() && (!hasVLX() || getPreferVectorWidth() >= 512); in canExtendTo512DQ()
DX86RegisterInfo.cpp136 if (!Subtarget.hasVLX() && in getLargestLegalSuperClass()
143 if (Subtarget.hasVLX() && in getLargestLegalSuperClass()
DX86ISelLowering.cpp692 addRegisterClass(MVT::f128, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
848 addRegisterClass(MVT::v4f32, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
871 addRegisterClass(MVT::v2f64, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
876 addRegisterClass(MVT::v16i8, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
878 addRegisterClass(MVT::v8i16, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
880 addRegisterClass(MVT::v4i32, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
882 addRegisterClass(MVT::v2i64, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
1051 !(Subtarget.hasBWI() && Subtarget.hasVLX())) in X86TargetLowering()
1168 addRegisterClass(MVT::v32i8, Subtarget.hasVLX() ? &X86::VR256XRegClass in X86TargetLowering()
1170 addRegisterClass(MVT::v16i16, Subtarget.hasVLX() ? &X86::VR256XRegClass in X86TargetLowering()
[all …]
DX86InstructionSelector.cpp402 bool HasVLX = STI.hasVLX(); in getLoadStoreOp()
1124 bool HasVLX = STI.hasVLX(); in selectExtract()
1257 bool HasVLX = STI.hasVLX(); in selectInsert()
DX86SpeculativeLoadHardening.cpp1667 if (!Subtarget->hasVLX() && (OpRC->hasSuperClassEq(&X86::VR128RegClass) || in hardenLoadAddr()
1711 assert(Subtarget->hasVLX() && "AVX512VL-specific register classes!"); in hardenLoadAddr()
DX86FastISel.cpp324 bool HasVLX = Subtarget->hasVLX(); in X86FastEmitLoad()
490 bool HasVLX = Subtarget->hasVLX(); in X86FastEmitStore()
2651 unsigned Opc = Subtarget->hasVLX() ? X86::VCVTPS2PHZ128rr in fastLowerIntrinsicCall()
2675 unsigned Opc = Subtarget->hasVLX() ? X86::VCVTPH2PSZ128rr in fastLowerIntrinsicCall()
DX86InstrInfo.td905 def HasVLX : Predicate<"Subtarget->hasVLX()">;
906 def NoVLX : Predicate<"!Subtarget->hasVLX()">;
907 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
908 def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
914 def NoVLX_Or_NoVNNI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVNNI()">;
920 def NoVLX_Or_NoVAES : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVAES()">;
928 Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()">;
DX86ISelDAGToDAG.cpp541 return Subtarget->hasVLX(); in isLegalMaskCompare()
4133 if (!(Subtarget->hasVLX() || NVT.is512BitVector())) in tryVPTERNLOG()
4362 bool Widen = !Subtarget->hasVLX() && !CmpVT.is512BitVector(); in tryVPTESTM()
4495 if (!(Subtarget->hasVLX() || NVT.is512BitVector())) in tryMatchBitSelect()
DX86InstrInfo.cpp3447 bool HasVLX = Subtarget.hasVLX(); in copyPhysReg()
3539 bool HasVLX = STI.hasVLX(); in getLoadStoreRegOpcode()
4662 bool HasVLX = Subtarget.hasVLX(); in expandPostRAPseudo()
4676 bool HasVLX = Subtarget.hasVLX(); in expandPostRAPseudo()
6167 assert((SpillSize == 64 || STI.hasVLX()) && in getBroadcastOpcode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86LegalizerInfo.cpp483 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512()
499 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512DQ()
523 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512BW()
DX86Subtarget.h688 bool hasVLX() const { return HasVLX; } in hasVLX() function
721 return hasAVX512() && (!hasVLX() || getPreferVectorWidth() >= 512); in canExtendTo512DQ()
DX86RegisterInfo.cpp141 if (!Subtarget.hasVLX() && in getLargestLegalSuperClass()
148 if (Subtarget.hasVLX() && in getLargestLegalSuperClass()
DX86ISelLowering.cpp683 addRegisterClass(MVT::f128, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
839 addRegisterClass(MVT::v4f32, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
862 addRegisterClass(MVT::v2f64, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
867 addRegisterClass(MVT::v16i8, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
869 addRegisterClass(MVT::v8i16, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
871 addRegisterClass(MVT::v4i32, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
873 addRegisterClass(MVT::v2i64, Subtarget.hasVLX() ? &X86::VR128XRegClass in X86TargetLowering()
1149 addRegisterClass(MVT::v32i8, Subtarget.hasVLX() ? &X86::VR256XRegClass in X86TargetLowering()
1151 addRegisterClass(MVT::v16i16, Subtarget.hasVLX() ? &X86::VR256XRegClass in X86TargetLowering()
1153 addRegisterClass(MVT::v8i32, Subtarget.hasVLX() ? &X86::VR256XRegClass in X86TargetLowering()
[all …]
DX86InstructionSelector.cpp401 bool HasVLX = STI.hasVLX(); in getLoadStoreOp()
1169 bool HasVLX = STI.hasVLX(); in selectExtract()
1302 bool HasVLX = STI.hasVLX(); in selectInsert()
DX86SpeculativeLoadHardening.cpp2040 if (!Subtarget->hasVLX() && (OpRC->hasSuperClassEq(&X86::VR128RegClass) || in hardenLoadAddr()
2084 assert(Subtarget->hasVLX() && "AVX512VL-specific register classes!"); in hardenLoadAddr()
DX86InstrInfo.td879 def HasVLX : Predicate<"Subtarget->hasVLX()">;
880 def NoVLX : Predicate<"!Subtarget->hasVLX()">;
881 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
882 def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
892 def NoVLX_Or_NoVAES : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVAES()">;
900 Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()">;
DX86ISelDAGToDAG.cpp552 return Subtarget->hasVLX(); in isLegalMaskCompare()
4219 bool Widen = !Subtarget->hasVLX() && !CmpVT.is512BitVector(); in tryVPTESTM()
4376 if (!(Subtarget->hasVLX() || NVT.is512BitVector())) in tryMatchBitSelect()
DX86InstrInfo.cpp2971 bool HasVLX = Subtarget.hasVLX(); in copyPhysReg()
3064 bool HasVLX = STI.hasVLX(); in getLoadStoreRegOpcode()
4115 bool HasVLX = Subtarget.hasVLX(); in expandPostRAPseudo()
4129 bool HasVLX = Subtarget.hasVLX(); in expandPostRAPseudo()
5411 assert((SpillSize == 64 || STI.hasVLX()) && in getBroadcastOpcode()
DX86FastISel.cpp325 bool HasVLX = Subtarget->hasVLX(); in X86FastEmitLoad()
491 bool HasVLX = Subtarget->hasVLX(); in X86FastEmitStore()
/external/llvm/lib/Target/X86/
DX86Subtarget.h449 bool hasVLX() const { return HasVLX; } in hasVLX() function
DX86ISelLowering.cpp1198 if (Subtarget.hasVLX()){ in X86TargetLowering()
1228 if (Subtarget.hasVLX()) { in X86TargetLowering()
1239 if (Subtarget.hasVLX()) { in X86TargetLowering()
1353 if (Subtarget.hasVLX()) { in X86TargetLowering()
1372 if (Subtarget.hasVLX()) { in X86TargetLowering()
1483 if (Subtarget.hasVLX()) in X86TargetLowering()
1486 LegalizeAction Action = Subtarget.hasVLX() ? Legal : Custom; in X86TargetLowering()
1515 if (Subtarget.hasVLX()) { in X86TargetLowering()
1523 if (!Subtarget.useSoftFloat() && Subtarget.hasVLX()) { in X86TargetLowering()
1727 if (Subtarget.hasBWI() && Subtarget.hasVLX()) in getSetCCResultType()
[all …]
DX86InstrInfo.td812 def HasVLX : Predicate<"Subtarget->hasVLX()">,
814 def NoVLX : Predicate<"!Subtarget->hasVLX()">;
815 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
816 def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
DX86TargetTransformInfo.cpp1561 if (VF == 2 || (VF == 4 && !ST->hasVLX())) in getGatherScatterOpCost()

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