| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_cmdbuf.c | 61 make_empty_list(&rmesa->radeon.hw.atomlist); in r200SetUpAtomList()
62 rmesa->radeon.hw.atomlist.name = "atom-list"; in r200SetUpAtomList()
64 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.ctx ); in r200SetUpAtomList()
65 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.set ); in r200SetUpAtomList()
66 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.lin ); in r200SetUpAtomList()
67 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.msk ); in r200SetUpAtomList()
68 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vpt ); in r200SetUpAtomList()
69 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vtx ); in r200SetUpAtomList()
70 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vap ); in r200SetUpAtomList()
71 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vte ); in r200SetUpAtomList()
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| D | r200_state_init.c | 339 if (r200->hw.set.cmd[SET_RE_CNTL] & R200_STIPPLE_ENABLE) in check_polygon_stipple()
629 rmesa->radeon.hw.max_state_size = 0; in r200InitState()
633 rmesa->hw.ATOM.cmd_size = SZ; \ in r200InitState()
634 rmesa->hw.ATOM.cmd = (GLuint *) calloc(SZ, sizeof(int)); \ in r200InitState()
635 rmesa->hw.ATOM.lastcmd = (GLuint *) calloc(SZ, sizeof(int)); \ in r200InitState()
636 rmesa->hw.ATOM.name = NM; \ in r200InitState()
637 rmesa->hw.ATOM.idx = IDX; \ in r200InitState()
639 rmesa->hw.ATOM.check = check_##CHK; \ in r200InitState()
640 rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ in r200InitState()
642 rmesa->hw.ATOM.check = NULL; \ in r200InitState()
[all …]
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| D | r200_state.c | 73 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; in r200AlphaFunc()
110 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; in r200AlphaFunc()
122 …rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3… in r200BlendColor()
208 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] & in r200_set_blend_state()
221 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ROP_ENABLE; in r200_set_blend_state()
222 rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func; in r200_set_blend_state()
223 rmesa->hw.ctx.cmd[CTX_RB3D_CBLENDCNTL] = eqn | func; in r200_set_blend_state()
226 … rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ALPHA_BLEND_ENABLE | R200_SEPARATE_ALPHA_ENABLE; in r200_set_blend_state()
229 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl; in r200_set_blend_state()
230 rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func; in r200_set_blend_state()
[all …]
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| D | r200_fragshader.c | 135 afs_cmd = (GLuint *) rmesa->hw.afs[1].cmd; in r200UpdateFSArith()
138 afs_cmd = (GLuint *) rmesa->hw.afs[0].cmd; in r200UpdateFSArith()
320 afs_cmd = (GLuint *) rmesa->hw.afs[1].cmd; in r200UpdateFSArith()
341 rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~(R200_MULTI_PASS_ENABLE | in r200UpdateFSRouting()
344 rmesa->hw.cst.cmd[CST_PP_CNTL_X] &= ~(R200_PPX_PFS_INST_ENABLE_MASK | in r200UpdateFSRouting()
351 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= shader->numArithInstr[0] == 8 ? in r200UpdateFSRouting()
355 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_MULTI_PASS_ENABLE; in r200UpdateFSRouting()
356 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= shader->numArithInstr[1] == 8 ? in r200UpdateFSRouting()
359 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= in r200UpdateFSRouting()
367 rmesa->hw.tex[reg].cmd[TEX_PP_TXMULTI_CTL] = 0; in r200UpdateFSRouting()
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| D | r200_ioctl.h | 85 rmesa->hw.ATOM.dirty = GL_TRUE; \
86 rmesa->radeon.hw.is_dirty = GL_TRUE; \
93 if (__dword != (rmesa)->hw.ATOM.cmd[__index]) { \
95 (rmesa)->hw.ATOM.cmd[__index] = __dword; \
100 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
101 rmesa->hw.ATOM.cmd_size * 4)
111 rmesa->radeon.hw.is_dirty = GL_TRUE; in R200_DB_STATECHANGE()
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| D | r200_tcl.c | 130 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
133 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
272 if (rmesa->hw.set.cmd[SET_RE_CNTL] & R200_PERSPECTIVE_ENABLE) { in r200TclPrimitive()
274 rmesa->hw.set.cmd[SET_RE_CNTL] &= ~R200_PERSPECTIVE_ENABLE; in r200TclPrimitive()
277 else if (!(rmesa->hw.set.cmd[SET_RE_CNTL] & R200_PERSPECTIVE_ENABLE)) { in r200TclPrimitive()
279 rmesa->hw.set.cmd[SET_RE_CNTL] |= R200_PERSPECTIVE_ENABLE; in r200TclPrimitive()
313 if (!rmesa->hw.vtx.dirty) in r200EnsureEmitSize()
314 state_size += rmesa->hw.vtx.check(&rmesa->radeon.glCtx, &rmesa->hw.vtx); in r200EnsureEmitSize()
452 if (rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] != out_compsel) { in r200_run_tcl_render()
454 rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] = out_compsel; in r200_run_tcl_render()
[all …]
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| /external/mesa3d/src/broadcom/simulator/ |
| D | v3d_simulator_wrapper.cpp | 49 uint32_t v3d_hw_get_mem(const struct v3d_hw *hw, size_t *size, void **p) in v3d_hw_get_mem() argument
51 return hw->get_mem(size, p); in v3d_hw_get_mem()
54 bool v3d_hw_alloc_mem(struct v3d_hw *hw, size_t min_size) in v3d_hw_alloc_mem() argument
56 return hw->alloc_mem(min_size) == V3D_HW_ALLOC_SUCCESS; in v3d_hw_alloc_mem()
59 bool v3d_hw_has_gca(struct v3d_hw *hw) in v3d_hw_has_gca() argument
61 return hw->has_gca(); in v3d_hw_has_gca()
64 uint32_t v3d_hw_read_reg(struct v3d_hw *hw, uint32_t reg) in v3d_hw_read_reg() argument
66 return hw->read_reg(reg); in v3d_hw_read_reg()
69 void v3d_hw_write_reg(struct v3d_hw *hw, uint32_t reg, uint32_t val) in v3d_hw_write_reg() argument
71 hw->write_reg(reg, val); in v3d_hw_write_reg()
[all …]
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| D | v3d_simulator_wrapper.h | 34 uint32_t v3d_hw_get_mem(const struct v3d_hw *hw, size_t *size, void **p);
35 bool v3d_hw_alloc_mem(struct v3d_hw *hw, size_t min_size);
36 bool v3d_hw_has_gca(struct v3d_hw *hw);
37 uint32_t v3d_hw_read_reg(struct v3d_hw *hw, uint32_t reg);
38 void v3d_hw_write_reg(struct v3d_hw *hw, uint32_t reg, uint32_t val);
39 void v3d_hw_tick(struct v3d_hw *hw);
40 int v3d_hw_get_version(struct v3d_hw *hw);
41 void v3d_hw_set_isr(struct v3d_hw *hw, void (*isr)(uint32_t status));
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_state.c | 70 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; in radeonAlphaFunc()
107 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; in radeonAlphaFunc()
114 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & ~RADEON_COMB_FCN_MASK; in radeonBlendEquationSeparate()
140 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; in radeonBlendEquationSeparate()
143 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE; in radeonBlendEquationSeparate()
145 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE; in radeonBlendEquationSeparate()
155 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & in radeonBlendFuncSeparate()
253 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; in radeonBlendFuncSeparate()
267 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_Z_TEST_MASK; in radeonDepthFunc()
271 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_NEVER; in radeonDepthFunc()
[all …]
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| D | radeon_state_init.c | 518 rmesa->radeon.hw.max_state_size = 0; in radeonInitState()
522 rmesa->hw.ATOM.cmd_size = SZ; \ in radeonInitState()
523 rmesa->hw.ATOM.cmd = (GLuint *) calloc(SZ, sizeof(int)); \ in radeonInitState()
524 rmesa->hw.ATOM.lastcmd = (GLuint *) calloc(SZ, sizeof(int)); \ in radeonInitState()
525 rmesa->hw.ATOM.name = NM; \ in radeonInitState()
526 rmesa->hw.ATOM.is_tcl = FLAG; \ in radeonInitState()
527 rmesa->hw.ATOM.check = check_##CHK; \ in radeonInitState()
528 rmesa->hw.ATOM.dirty = GL_TRUE; \ in radeonInitState()
529 rmesa->hw.ATOM.idx = IDX; \ in radeonInitState()
530 rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ in radeonInitState()
[all …]
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| D | radeon_ioctl.c | 66 make_empty_list(&rmesa->radeon.hw.atomlist); in radeonSetUpAtomList()
67 rmesa->radeon.hw.atomlist.name = "atom-list"; in radeonSetUpAtomList()
69 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.ctx); in radeonSetUpAtomList()
70 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.set); in radeonSetUpAtomList()
71 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.lin); in radeonSetUpAtomList()
72 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.msk); in radeonSetUpAtomList()
73 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.vpt); in radeonSetUpAtomList()
74 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.tcl); in radeonSetUpAtomList()
75 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.msc); in radeonSetUpAtomList()
77 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.tex[i]); in radeonSetUpAtomList()
[all …]
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| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| D | nv04_context.c | 54 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; in nv04_context_engine() local
64 fahrenheit = hw->eng3dm; in nv04_context_engine()
66 fahrenheit = hw->eng3d; in nv04_context_engine()
80 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; in nv04_hwctx_init() local
82 struct nv04_fifo *fifo = hw->chan->data; in nv04_hwctx_init()
85 PUSH_DATA (push, hw->surf3d->handle); in nv04_hwctx_init()
87 PUSH_DATA (push, hw->ntfy->handle); in nv04_hwctx_init()
92 PUSH_DATA (push, hw->eng3d->handle); in nv04_hwctx_init()
94 PUSH_DATA (push, hw->ntfy->handle); in nv04_hwctx_init()
97 PUSH_DATA (push, hw->surf3d->handle); in nv04_hwctx_init()
[all …]
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| D | nv04_surface.c | 200 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; in nv04_surface_copy_swizzle() local
201 struct nouveau_object *swzsurf = hw->swzsurf; in nv04_surface_copy_swizzle()
202 struct nv04_fifo *fifo = hw->chan->data; in nv04_surface_copy_swizzle()
265 PUSH_DATA (push, hw->surf3d->handle); in nv04_surface_copy_swizzle()
281 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; in nv04_surface_copy_m2mf() local
282 struct nv04_fifo *fifo = hw->chan->data; in nv04_surface_copy_m2mf()
429 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; in nv04_surface_fill() local
430 struct nv04_fifo *fifo = hw->chan->data; in nv04_surface_fill()
462 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; in nv04_surface_takedown() local
464 nouveau_object_del(&hw->swzsurf); in nv04_surface_takedown()
[all …]
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| D | nouveau_context.c | 147 }, sizeof(struct nv04_fifo), &nctx->hw.chan); in nouveau_context_init()
154 ret = nouveau_client_new(context_dev(ctx), &nctx->hw.client); in nouveau_context_init()
161 ret = nouveau_pushbuf_new(nctx->hw.client, nctx->hw.chan, 4, in nouveau_context_init()
162 512 * 1024, true, &nctx->hw.pushbuf); in nouveau_context_init()
169 ret = nouveau_bufctx_new(nctx->hw.client, 16, &nctx->hw.bufctx); in nouveau_context_init()
175 nctx->hw.pushbuf->user_priv = nctx->hw.bufctx; in nouveau_context_init()
178 ret = nouveau_object_new(nctx->hw.chan, 0x00000000, NV01_NULL_CLASS, in nouveau_context_init()
179 NULL, 0, &nctx->hw.null); in nouveau_context_init()
214 nouveau_bufctx_del(&nctx->hw.bufctx); in nouveau_context_deinit()
215 nouveau_pushbuf_del(&nctx->hw.pushbuf); in nouveau_context_deinit()
[all …]
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nvfx_fragprog.c | 93 uint32_t *hw = &fp->insn[fpc->inst_offset]; in emit_src() local
99 hw[0] |= (src.reg.index << NVFX_FP_OP_INPUT_SRC_SHIFT); in emit_src()
111 hw = &fp->insn[fpc->inst_offset]; in emit_src()
124 hw = &fp->insn[fpc->inst_offset]; in emit_src()
152 hw[1] |= (1 << (29 + pos)); in emit_src()
159 hw[pos + 1] |= sr; in emit_src()
166 uint32_t *hw = &fp->insn[fpc->inst_offset]; in emit_dst() local
173 hw[0] |= NVFX_FP_OP_OUT_REG_HALF; in emit_dst()
182 hw[0] |= (1 << 30); in emit_dst()
188 hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); in emit_dst()
[all …]
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| D | nvfx_vertprog.c | 120 emit_src(struct nvfx_vpc *vpc, uint32_t *hw, in emit_src() argument
136 hw[1] |= (src.reg.index << NVFX_VP(INST_INPUT_SRC_SHIFT)); in emit_src()
146 hw[1] |= (src.reg.index << NVFX_VP(INST_CONST_SRC_SHIFT)) & in emit_src()
162 hw[0] |= (1 << (21 + pos)); in emit_src()
171 hw[3] |= NVFX_VP(INST_INDEX_CONST); in emit_src()
173 hw[0] |= NVFX_VP(INST_INDEX_INPUT); in emit_src()
178 hw[0] |= NVFX_VP(INST_ADDR_REG_SELECT_1); in emit_src()
179 hw[0] |= src.indirect_swz << NVFX_VP(INST_ADDR_SWZ_SHIFT); in emit_src()
184 hw[1] |= ((sr & NVFX_VP(SRC0_HIGH_MASK)) >> in emit_src()
186 hw[2] |= (sr & NVFX_VP(SRC0_LOW_MASK)) << in emit_src()
[all …]
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| /external/libese/tools/ese_replay/ |
| D | hw.c | 33 printf("\t%s\t(%s / %s)\n", supported->hw[i].name, supported->hw[i].sym, in print_supported_hardware()
34 supported->hw[i].lib); in print_supported_hardware()
41 if (!strcmp(name, supported->hw[i].name)) { in find_supported_hardware()
49 void release_hardware(const struct Hardware *hw) { in release_hardware() argument
50 void *hw_handle = dlopen(hw->lib, RTLD_NOW); in release_hardware()
56 bool initialize_hardware(struct EseInterface *ese, const struct Hardware *hw) { in initialize_hardware() argument
57 void *hw_handle = dlopen(hw->lib, RTLD_NOW); in initialize_hardware()
62 const struct EseOperations **hw_ops = dlsym(hw_handle, hw->sym); in initialize_hardware()
68 ese_init(ese, *hw); in initialize_hardware()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_state_framebuffer.c | 58 struct pipe_framebuffer_state *hw = &svga->state.hw_clear.framebuffer; in emit_fb_vgpu9() local
71 if ((curr->cbufs[i] != hw->cbufs[i]) || (reemit && hw->cbufs[i])) { in emit_fb_vgpu9()
76 if (hw->cbufs[i] && svga_surface_needs_propagation(hw->cbufs[i])) in emit_fb_vgpu9()
77 svga_propagate_surface(svga, hw->cbufs[i], TRUE); in emit_fb_vgpu9()
84 pipe_surface_reference(&hw->cbufs[i], curr->cbufs[i]); in emit_fb_vgpu9()
95 if ((curr->zsbuf != hw->zsbuf) || (reemit && hw->zsbuf)) { in emit_fb_vgpu9()
101 if (hw->zsbuf && svga_surface_needs_propagation(hw->zsbuf)) in emit_fb_vgpu9()
102 svga_propagate_surface(svga, hw->zsbuf, TRUE); in emit_fb_vgpu9()
117 pipe_surface_reference(&hw->zsbuf, curr->zsbuf); in emit_fb_vgpu9()
143 struct pipe_framebuffer_state *hw = &svga->state.hw_clear.framebuffer; in svga_reemit_framebuffer_bindings_vgpu9() local
[all …]
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| /external/tensorflow/tensorflow/core/kernels/ |
| D | summary_image_op.cc | 78 const int hw = h * w; // Compact these two dims for simplicity in Compute() local
81 OP_REQUIRES(c, hw > 0 && depth > 0, in Compute()
89 auto ith_image = [&tensor, batch_size, hw, depth](int i) { in Compute()
90 auto values = tensor.shaped<uint8, 3>({batch_size, hw, depth}); in Compute()
92 &values(i, 0, 0), Eigen::DSizes<Eigen::DenseIndex, 2>(hw, depth)); in Compute()
97 NormalizeAndAddImages<Eigen::half>(c, tensor, h, w, hw, depth, batch_size, in Compute()
100 NormalizeAndAddImages<float>(c, tensor, h, w, hw, depth, batch_size, in Compute()
103 NormalizeAndAddImages<double>(c, tensor, h, w, hw, depth, batch_size, in Compute()
114 int w, int hw, int depth, int batch_size, in NormalizeAndAddImages() argument
125 Uint8Image image(hw, depth); in NormalizeAndAddImages()
[all …]
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| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | Makefile.sources | 2 hw/cmdstream.xml.h \
3 hw/common.xml.h \
4 hw/common_3d.xml.h \
5 hw/isa.xml.h \
6 hw/state_3d.xml.h \
7 hw/state_blt.xml.h \
8 hw/state.xml.h \
9 hw/texdesc_3d.xml.h \
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| /external/python/cpython2/Lib/idlelib/idle_test/ |
| D | test_text.py | 9 hw = 'hello\nworld' # usual initial insert after initialization variable in TextTest
10 hwn = hw+'\n' # \n present at initialization, before insert
32 self.text.insert('1.0', self.hw)
46 self.text.insert('1.0', self.hw)
58 Equal(get('1.0', '2.5'), self.hw)
67 insert('1.0', self.hw)
93 self.text.insert('1.0', self.hw)
117 self.text.insert('1.0', self.hw)
141 self.text.insert('1.0', self.hw)
149 self.text.insert('1.0', self.hw)
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| D | test_formatparagraph.py | 165 hw = "O hello world"
170 Equal(reform(hw, 1), "O\nhello\nworld")
171 Equal(reform(hw, 6), "O\nhello\nworld")
172 Equal(reform(hw, 7), "O hello\nworld")
173 Equal(reform(hw, 12), "O hello\nworld")
174 Equal(reform(hw, 13), "O hello world")
177 hw = "\nO hello world"
178 Equal(reform(hw, 1), "\nO\nhello\nworld")
179 Equal(reform(hw, 6), "\nO\nhello\nworld")
180 Equal(reform(hw, 7), "\nO hello\nworld")
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| /external/python/cpython3/Lib/idlelib/idle_test/ |
| D | test_text.py | 12 hw = 'hello\nworld' # Several tests insert this after initialization. variable in TextTest
13 hwn = hw+'\n' # \n present at initialization, before insert
34 self.text.insert('1.0', self.hw)
48 self.text.insert('1.0', self.hw)
60 Equal(get('1.0', '2.5'), self.hw)
69 insert('1.0', self.hw)
95 self.text.insert('1.0', self.hw)
119 self.text.insert('1.0', self.hw)
143 self.text.insert('1.0', self.hw)
151 self.text.insert('1.0', self.hw)
[all …]
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| /external/perfetto/test/trace_processor/smoke/ |
| D | thread_cpu_time_example_android_trace_30s.out | 407 759,759,"provider@2.4-se","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
408 1543,759,"CAM_imgTh","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
409 1696,759,"provider@2.4-se","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
410 1926,759,"HwBinder:759_1","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
411 5606,759,"HwBinder:759_1","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
412 5607,759,"HwBinder:759_1","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
413 5608,759,"HwBinder:759_1","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
414 5609,759,"QCamera3HdrPlus","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
415 5610,759,"CAM_MctServ","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
416 5611,759,"CAM_MctBus","/vendor/bin/hw/android.hardware.camera.provider@2.4-service",3337433441
[all …]
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| /external/tensorflow/tensorflow/core/summary/ |
| D | summary_converter.cc | 108 void NormalizeFloatImage(int hw, int depth, in NormalizeFloatImage() argument
131 for (int i = 0; i < hw; i++) { in NormalizeFloatImage()
161 for (int i = 0; i < hw; i++) { in NormalizeFloatImage()
180 int hw, int depth, int batch_size, in NormalizeAndAddImages() argument
193 Uint8Image image(hw, depth); in NormalizeAndAddImages()
194 auto ith_image = [&tensor, &image, bad_color, batch_size, hw, depth](int i) { in NormalizeAndAddImages()
195 auto tensor_eigen = tensor.template shaped<T, 3>({batch_size, hw, depth}); in NormalizeAndAddImages()
197 &tensor_eigen(i, 0, 0), Eigen::DSizes<Eigen::DenseIndex, 2>(hw, depth)); in NormalizeAndAddImages()
198 NormalizeFloatImage<T>(hw, depth, values, bad_color, &image); in NormalizeAndAddImages()
256 const int hw = h * w; // Compact these two dims for simplicity in AddTensorAsImageToSummary() local
[all …]
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