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Searched refs:i4_grid_mask (Results 1 – 10 of 10) sorted by relevance

/external/libhevc/encoder/
Dhme_search_algo.c145 pf_sad_fxn = hme_get_sad_fxn(e_blk_size, ps_err_prms->i4_grid_mask, ps_err_prms->i4_part_mask); in hme_compute_grid_results()
148 hme_get_result_fxn(ps_err_prms->i4_grid_mask, ps_err_prms->i4_part_mask, i4_num_results); in hme_compute_grid_results()
205 S32 i4_part_mask, i4_grid_mask; in hme_pred_search_square_stepn() local
315 i4_grid_mask = 0x1ff; in hme_pred_search_square_stepn()
320 i4_grid_mask &= hme_clamp_grid_by_mvrange(&s_search_node, i4_step, ps_range_prms); in hme_pred_search_square_stepn()
322 s_err_prms.i4_grid_mask = i4_grid_mask; in hme_pred_search_square_stepn()
330 s_result_prms.i4_grid_mask = i4_grid_mask; in hme_pred_search_square_stepn()
336 s_err_prms.i4_grid_mask = 0x1; in hme_pred_search_square_stepn()
337 s_result_prms.i4_grid_mask = 0x1; in hme_pred_search_square_stepn()
363 ASSERT(ps_err_prms->i4_grid_mask != 1); in hme_pred_search_square_stepn()
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Dhme_subpel.c246 S32 i4_grid_mask, in hme_qpel_interp_comprehensive() argument
256 ((i4_grid_mask & (1 << PT_B)) >> PT_B) + ((i4_grid_mask & (1 << PT_T)) >> (PT_T - 1)); in hme_qpel_interp_comprehensive()
259 ((i4_grid_mask & (1 << PT_R)) >> PT_R) + ((i4_grid_mask & (1 << PT_L)) >> (PT_L - 1)); in hme_qpel_interp_comprehensive()
936 s_err_prms.i4_grid_mask = 1; in hme_compute_pred_and_evaluate_bi()
2301 S32 i4_offset, i4_grid_mask; in hme_subpel_refine_search_node_high_speed() local
2406 s_result_prms.i4_grid_mask = 1; in hme_subpel_refine_search_node_high_speed()
2416 i4_grid_mask = (GRID_DIAMOND_ENABLE_ALL); in hme_subpel_refine_search_node_high_speed()
2417 i4_grid_mask &= hme_clamp_grid_by_mvrange(ps_search_node, 2, ps_range_prms); in hme_subpel_refine_search_node_high_speed()
2432 s_err_prms.i4_grid_mask = 1; in hme_subpel_refine_search_node_high_speed()
2448 if(i4_grid_mask & BIT_EN(PT_C)) in hme_subpel_refine_search_node_high_speed()
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Dhme_err_compute.c419 s_grid.pi4_grd_mask = &ps_prms->i4_grid_mask; in hme_evalsad_grid_pu_16x16()
453 if(ps_prms->i4_grid_mask & (1 << i)) in hme_evalsad_grid_npu_MxN()
465 if(!(ps_prms->i4_grid_mask & (1 << i))) in hme_evalsad_grid_npu_MxN()
1453 S32 i4_grid_mask, i, i4_min_id; in hme_update_results_grid_pu_bestn_xtreme_speed() local
1467 i4_grid_mask = ps_result_prms->i4_grid_mask; in hme_update_results_grid_pu_bestn_xtreme_speed()
1471 if(i4_grid_mask & (1 << i)) in hme_update_results_grid_pu_bestn_xtreme_speed()
1512 if(!(i4_grid_mask & (1 << i4_grid_pt))) in hme_update_results_grid_pu_bestn_xtreme_speed()
1566 S32 i4_grid_mask, i4_count, i, i4_min_id; in hme_update_results_grid_pu_bestn() local
1580 i4_grid_mask = ps_result_prms->i4_grid_mask; in hme_update_results_grid_pu_bestn()
1584 if(i4_grid_mask & (1 << i)) in hme_update_results_grid_pu_bestn()
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Dihevce_me_instr_set_router.c353 s_grid.pi4_grd_mask = &ps_prms->i4_grid_mask; in hme_evalsad_grid_pu_MxM()
380 PF_SAD_FXN_T hme_get_sad_fxn(BLK_SIZE_T e_blk_size, S32 i4_grid_mask, S32 i4_part_mask) in hme_get_sad_fxn() argument
382 S32 i4_grid_en = ((i4_grid_mask & 0x1fe) != 0); in hme_get_sad_fxn()
Dhme_err_compute.h119 PF_RESULT_FXN_T hme_get_result_fxn(S32 i4_grid_mask, S32 i4_part_mask, S32 i4_num_results);
Dihevce_me_instr_set_router.h171 BLK_SIZE_T e_blk_size, S32 i4_grid_mask, S32 i4_part_mask);
Dhme_defs.h1994 S32 i4_grid_mask; member
2156 S32 i4_grid_mask; member
Dhme_refine.c827 s_result_prms.i4_grid_mask = 1; in hme_pick_eval_merge_candts()
833 s_err_prms.i4_grid_mask = 1; in hme_pick_eval_merge_candts()
Dhme_utils.c2586 ps_err_prms->i4_grid_mask = 1; in hme_decide_part_types()
/external/libhevc/encoder/arm/
Dihevce_me_neon.c425 if(ps_prms->i4_grid_mask & (1 << i)) in hme_evalsad_grid_npu_MxN_neon()
435 if(!(ps_prms->i4_grid_mask & (1 << i))) in hme_evalsad_grid_npu_MxN_neon()