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Searched refs:i830 (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Di830_state.c54 struct i830_context *i830 = i830_context(ctx); in i830StencilFuncSeparate() local
63 I830_STATECHANGE(i830, I830_UPLOAD_CTX); in i830StencilFuncSeparate()
64 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK; in i830StencilFuncSeparate()
65 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK | in i830StencilFuncSeparate()
67 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK | in i830StencilFuncSeparate()
69 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE | in i830StencilFuncSeparate()
78 struct i830_context *i830 = i830_context(ctx); in i830StencilMaskSeparate() local
84 I830_STATECHANGE(i830, I830_UPLOAD_CTX); in i830StencilMaskSeparate()
85 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK; in i830StencilMaskSeparate()
86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK | in i830StencilMaskSeparate()
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Di830_vtbl.c80 struct i830_context *i830 = i830_context(ctx); in i830_render_start() local
134 GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & in i830_render_start()
164 if (mcs != i830->state.Tex[i][I830_TEXREG_MCS]) { in i830_render_start()
165 I830_STATECHANGE(i830, I830_UPLOAD_TEX(i)); in i830_render_start()
166 i830->state.Tex[i][I830_TEXREG_MCS] = mcs; in i830_render_start()
179 if (v0 != i830->state.Ctx[I830_CTXREG_VF] || in i830_render_start()
180 v2 != i830->state.Ctx[I830_CTXREG_VF2] || in i830_render_start()
181 mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] || in i830_render_start()
182 index_bitset != i830->last_index_bitset) { in i830_render_start()
183 I830_STATECHANGE(i830, I830_UPLOAD_CTX); in i830_render_start()
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Di830_texblend.c131 i830SetTexEnvCombine(struct i830_context * i830, in i830SetTexEnvCombine() argument
388 emit_texblend(struct i830_context *i830, GLuint unit, GLuint blendUnit, in emit_texblend() argument
392 &i830->intel.ctx.Texture.FixedFuncUnit[unit]; in emit_texblend()
401 tmp_sz = i830SetTexEnvCombine(i830, texUnit->_CurrentCombine, blendUnit, in emit_texblend()
407 if (tmp_sz != i830->state.TexBlendWordsUsed[blendUnit] || in emit_texblend()
408 memcmp(tmp, i830->state.TexBlend[blendUnit], in emit_texblend()
411 I830_STATECHANGE(i830, I830_UPLOAD_TEXBLEND(blendUnit)); in emit_texblend()
412 memcpy(i830->state.TexBlend[blendUnit], tmp, tmp_sz * sizeof(GLuint)); in emit_texblend()
413 i830->state.TexBlendWordsUsed[blendUnit] = tmp_sz; in emit_texblend()
416 I830_ACTIVESTATE(i830, I830_UPLOAD_TEXBLEND(blendUnit), true); in emit_texblend()
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Di830_context.h154 #define I830_STATECHANGE(i830, flag) \ argument
156 INTEL_FIREVERTICES( &i830->intel ); \
157 i830->state.emitted &= ~flag; \
160 #define I830_ACTIVESTATE(i830, flag, mode) \ argument
162 INTEL_FIREVERTICES( &i830->intel ); \
164 i830->state.active |= flag; \
166 i830->state.active &= ~flag; \
171 extern void i830InitVtbl(struct i830_context *i830);
198 extern GLuint i830SetTexEnvCombine(struct i830_context *i830,
203 extern void i830EmitTextureBlend(struct i830_context *i830);
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Di830_texstate.c118 struct i830_context *i830 = i830_context(ctx); in i830_update_tex_unit() local
124 GLuint *state = i830->state.Tex[unit], format, pitch; in i830_update_tex_unit()
133 if (i830->state.tex_buffer[unit] != NULL) { in i830_update_tex_unit()
134 drm_intel_bo_unreference(i830->state.tex_buffer[unit]); in i830_update_tex_unit()
135 i830->state.tex_buffer[unit] = NULL; in i830_update_tex_unit()
150 i830->state.tex_buffer[unit] = intelObj->mt->region->bo; in i830_update_tex_unit()
156 i830->state.tex_offset[unit] = dst_x * intelObj->mt->cpp + dst_y * pitch; in i830_update_tex_unit()
315 I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), true); in i830_update_tex_unit()
319 I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit)); in i830_update_tex_unit()
329 struct i830_context *i830 = i830_context(&intel->ctx); in i830UpdateTextureState() local
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Di830_context.c64 struct i830_context *i830 = rzalloc(NULL, struct i830_context); in i830CreateContext() local
65 struct intel_context *intel = &i830->intel; in i830CreateContext()
68 if (!i830) { in i830CreateContext()
73 i830InitVtbl(i830); in i830CreateContext()
81 ralloc_free(i830); in i830CreateContext()
122 i830InitState(i830); in i830CreateContext()
Dintel_tris.c282 struct i830_context *i830 = i830_context(&intel->ctx); in intel_flush_prim() local
298 OUT_BATCH((i830->state.Ctx[I830_CTXREG_VF] & VFT0_TEX_COUNT_MASK) >> in intel_flush_prim()
300 (i830->state.Ctx[I830_CTXREG_VF2] << 16) | in intel_flush_prim()
/external/mesa3d/docs/relnotes/
D8.0.3.rst47 i830: intel_get_vb_max / intel_batchbuffer_space mismatch.
92 - dri/i915: Fix off-by-one in i830 clip region size.
142 - i830: Compute initial number of vertices from remaining batch space
177 - i915: Fix piglit fbo-nodepth-test on i830.
250 - i915: Fix i830 polygon stipple from PBOs.
D11.0.3.rst154 - i830: Fix collision between I830_UPLOAD_RASTER_RULES and
D8.0.4.rst149 - i830: Fix crash for GL_STENCIL_TEST in i830Enable()
D7.11.1.rst139 - i830: Add missing vtable entry for i830 from the hiz work.
D8.0.5.rst144 - i830: Fix stack corruption