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Searched refs:imm0 (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/frontends/xa/
Dxa_tgsi.c261 const struct ureg_src *imm0, in xrender_tex() argument
272 TGSI_SWIZZLE_Y), ureg_scalar(*imm0, in xrender_tex()
276 TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y), ureg_scalar(*imm0, in xrender_tex()
290 ureg_scalar(*imm0, TGSI_SWIZZLE_W)); in xrender_tex()
310 ureg_scalar(*imm0, TGSI_SWIZZLE_W)); in xrender_tex()
317 const struct ureg_src *imm0, in read_input() argument
334 xrender_tex(ureg, dst, input, sampler, imm0, in read_input()
345 struct ureg_src imm0 = { 0 }; in create_fs() local
380 imm0 = ureg_imm4f(ureg, 0, 0, 0, 1); in create_fs()
386 read_input(ureg, src, &imm0, src_repeat_none, src_swizzle, in create_fs()
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_peephole.cpp552 ImmediateValue &imm0, ImmediateValue &imm1) in expr() argument
554 struct Storage *const a = &imm0.reg, *const b = &imm1.reg; in expr()
786 ImmediateValue &imm0, in expr() argument
790 struct Storage *const a = &imm0.reg, *const b = &imm1.reg, *const c = &imm2.reg; in expr()
1049 ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s) in opnd() argument
1065 uint64_t val = imm0.reg.data.u64; in opnd()
1079 tryCollapseChainedMULs(i, s, imm0); in opnd()
1083 if (imm0.isInteger(1) && i->dType == TYPE_S32) { in opnd()
1090 } else if (imm0.isInteger(0) || imm0.isInteger(1)) { in opnd()
1098 } else if (!imm0.isNegative() && imm0.isPow2()) { in opnd()
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenFastISel.inc11221 unsigned fastEmit_ISD_Constant_MVT_i32_i(MVT RetVT, uint64_t imm0) {
11224 return fastEmitInst_i(AArch64::MOVi32imm, &AArch64::GPR32RegClass, imm0);
11227 unsigned fastEmit_ISD_Constant_MVT_i64_i(MVT RetVT, uint64_t imm0) {
11230 return fastEmitInst_i(AArch64::MOVi64imm, &AArch64::GPR64RegClass, imm0);
11233 unsigned fastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) {
11235 case MVT::i32: return fastEmit_ISD_Constant_MVT_i32_i(RetVT, imm0);
11236 case MVT::i64: return fastEmit_ISD_Constant_MVT_i64_i(RetVT, imm0);
11243 unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) override {
11244 if (VT == MVT::i32 && Predicate_imm0_255(imm0))
11245 if (unsigned Reg = fastEmit_i_Predicate_imm0_255(VT, RetVT, Opcode, imm0))
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenFastISel.inc4008 unsigned fastEmit_ISD_Constant_MVT_i32_i(MVT RetVT, uint64_t imm0) {
4012 return fastEmitInst_i(Mips::LwConstant32, &Mips::CPU16RegsRegClass, imm0);
4017 unsigned fastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) {
4019 case MVT::i32: return fastEmit_ISD_Constant_MVT_i32_i(RetVT, imm0);
4026 unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) override {
4028 case ISD::Constant: return fastEmit_ISD_Constant_i(VT, RetVT, imm0);
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenFastISel.inc7751 unsigned fastEmit_ISD_Constant_MVT_i32_i(MVT RetVT, uint64_t imm0) {
7755 return fastEmitInst_i(ARM::t2MOVi32imm, &ARM::rGPRRegClass, imm0);
7760 unsigned fastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) {
7762 case MVT::i32: return fastEmit_ISD_Constant_MVT_i32_i(RetVT, imm0);
7769 unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) override {
7771 case ISD::Constant: return fastEmit_ISD_Constant_i(VT, RetVT, imm0);
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrPrefix.td382 // 8RR:D-Form: [ 1 1 0 // // imm0
407 // 8RR:D-Form: [ 1 1 0 // // imm0
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc16178 unsigned fastEmit_ISD_Constant_MVT_i8_i(MVT RetVT, uint64_t imm0) {
16181 return fastEmitInst_i(X86::MOV8ri, &X86::GR8RegClass, imm0);
16184 unsigned fastEmit_ISD_Constant_MVT_i16_i(MVT RetVT, uint64_t imm0) {
16187 return fastEmitInst_i(X86::MOV16ri, &X86::GR16RegClass, imm0);
16190 unsigned fastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) {
16192 case MVT::i8: return fastEmit_ISD_Constant_MVT_i8_i(RetVT, imm0);
16193 case MVT::i16: return fastEmit_ISD_Constant_MVT_i16_i(RetVT, imm0);
16200 unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) override {
16202 case ISD::Constant: return fastEmit_ISD_Constant_i(VT, RetVT, imm0);