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Searched refs:imm11 (Results 1 – 12 of 12) sorted by relevance

/external/llvm-project/lld/ELF/Arch/
DRISCV.cpp291 uint16_t imm11 = extractBits(val, 11, 11) << 12; in relocate() local
299 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; in relocate()
325 uint32_t imm11 = extractBits(val, 11, 11) << 20; in relocate() local
327 insn |= imm20 | imm10_1 | imm11 | imm19_12; in relocate()
341 uint32_t imm11 = extractBits(val, 11, 11) << 7; in relocate() local
342 insn |= imm12 | imm10_5 | imm4_1 | imm11; in relocate()
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dconstants-i64.ll297 define i64 @imm11() #0 {
298 ; CHECK-LABEL: imm11:
/external/llvm/lib/Target/Mips/
DMips16InstrFormats.td100 // Format I instruction class in Mips : <|opcode|imm11|>
107 bits<11> imm11;
111 let Inst{10-0} = imm11;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrFormats.td99 // Format I instruction class in Mips : <|opcode|imm11|>
106 bits<11> imm11;
110 let Inst{10-0} = imm11;
/external/llvm-project/llvm/lib/Target/Mips/
DMips16InstrFormats.td99 // Format I instruction class in Mips : <|opcode|imm11|>
106 bits<11> imm11;
110 let Inst{10-0} = imm11;
/external/llvm-project/lld/lib/ReaderWriter/MachO/
DArchHandler_arm.cpp405 uint32_t imm11 = (instruction >> 16) & 0x7FF; in getDisplacementFromThumbBranch() local
409 (s << 24) | (i1 << 23) | (i2 << 22) | (imm10 << 12) | (imm11 << 1); in getDisplacementFromThumbBranch()
453 uint32_t imm11 = (uint32_t)(displacement >> 1) & 0x7FF; in setDisplacementInThumbBranch() local
456 uint32_t nextDisp = (j1 << 13) | (j2 << 11) | imm11; in setDisplacementInThumbBranch()
/external/llvm-project/lldb/source/Plugins/Instruction/ARM/
DEmulateInstructionARM.cpp2039 uint32_t imm11 = Bits32(opcode, 10, 0); in EmulateBLXImmediate() local
2043 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); in EmulateBLXImmediate()
2847 uint32_t imm11 = Bits32(opcode, 10, 0); in EmulateB() local
2849 (S << 20) | (J2 << 19) | (J1 << 18) | (imm6 << 12) | (imm11 << 1); in EmulateB()
2860 uint32_t imm11 = Bits32(opcode, 10, 0); in EmulateB() local
2864 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); in EmulateB()
/external/capstone/arch/ARM/
DARMDisassembler.c2242 unsigned imm11 = fieldFromInstruction_4(Insn, 0, 11); in DecodeT2BInstruction() local
2243 unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; in DecodeT2BInstruction()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2276 unsigned imm11 = fieldFromInstruction(Insn, 0, 11); in DecodeT2BInstruction() local
2277 unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; in DecodeT2BInstruction()
/external/llvm-project/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2649 unsigned imm11 = fieldFromInstruction(Insn, 0, 11); in DecodeT2BInstruction() local
2650 unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; in DecodeT2BInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2628 unsigned imm11 = fieldFromInstruction(Insn, 0, 11); in DecodeT2BInstruction() local
2629 unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; in DecodeT2BInstruction()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc4155 // op: imm11