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Searched refs:imm20 (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrFormats.td22 // a 21-bit value (where the LSB is always zero), we describe it as an imm20
295 bits<20> imm20;
298 let Inst{31-12} = imm20;
306 bits<20> imm20;
309 let Inst{31} = imm20{19};
310 let Inst{30-21} = imm20{9-0};
311 let Inst{20} = imm20{10};
312 let Inst{19-12} = imm20{18-11};
DRISCVInstrInfo.td373 def LUI : RVInstU<OPC_LUI, (outs GPR:$rd), (ins uimm20_lui:$imm20),
374 "lui", "$rd, $imm20">, Sched<[WriteIALU]>;
376 def AUIPC : RVInstU<OPC_AUIPC, (outs GPR:$rd), (ins uimm20_auipc:$imm20),
377 "auipc", "$rd, $imm20">, Sched<[WriteIALU]>;
380 def JAL : RVInstJ<OPC_JAL, (outs GPR:$rd), (ins simm21_lsb0_jal:$imm20),
381 "jal", "$rd, $imm20">, Sched<[WriteJal]>;
902 def PseudoBR : Pseudo<(outs), (ins simm21_lsb0_jal:$imm20), [(br bb:$imm20)]>,
903 PseudoInstExpansion<(JAL X0, simm21_lsb0_jal:$imm20)>;
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrFormats.td22 // a 21-bit value (where the LSB is always zero), we describe it as an imm20
335 bits<20> imm20;
338 let Inst{31-12} = imm20;
346 bits<20> imm20;
349 let Inst{31} = imm20{19};
350 let Inst{30-21} = imm20{9-0};
351 let Inst{20} = imm20{10};
352 let Inst{19-12} = imm20{18-11};
DRISCVInstrInfo.td423 def LUI : RVInstU<OPC_LUI, (outs GPR:$rd), (ins uimm20_lui:$imm20),
424 "lui", "$rd, $imm20">, Sched<[WriteIALU]>;
426 def AUIPC : RVInstU<OPC_AUIPC, (outs GPR:$rd), (ins uimm20_auipc:$imm20),
427 "auipc", "$rd, $imm20">, Sched<[WriteIALU]>;
430 def JAL : RVInstJ<OPC_JAL, (outs GPR:$rd), (ins simm21_lsb0_jal:$imm20),
431 "jal", "$rd, $imm20">, Sched<[WriteJal]>;
964 def PseudoBR : Pseudo<(outs), (ins simm21_lsb0_jal:$imm20), [(br bb:$imm20)]>,
965 PseudoInstExpansion<(JAL X0, simm21_lsb0_jal:$imm20)>;
/external/llvm-project/lld/ELF/Arch/
DRISCV.cpp323 uint32_t imm20 = extractBits(val, 20, 20) << 31; in relocate() local
327 insn |= imm20 | imm10_1 | imm11 | imm19_12; in relocate()