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1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
3 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED
4 
5 _Accum a;
6 _Fract f;
7 long _Fract lf;
8 unsigned _Accum ua;
9 short unsigned _Accum usa;
10 unsigned _Fract uf;
11 
12 _Sat _Accum sa;
13 _Sat _Fract sf;
14 _Sat long _Fract slf;
15 _Sat unsigned _Accum sua;
16 _Sat short unsigned _Accum susa;
17 _Sat unsigned _Fract suf;
18 
19 int i;
20 
21 // CHECK-LABEL: @inc_a(
22 // CHECK-NEXT:  entry:
23 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
24 // CHECK-NEXT:    [[TMP1:%.*]] = sub i32 [[TMP0]], -32768
25 // CHECK-NEXT:    store i32 [[TMP1]], i32* @a, align 4
26 // CHECK-NEXT:    ret void
27 //
inc_a()28 void inc_a() {
29   a++;
30 }
31 
32 // CHECK-LABEL: @inc_f(
33 // CHECK-NEXT:  entry:
34 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @f, align 2
35 // CHECK-NEXT:    [[TMP1:%.*]] = sub i16 [[TMP0]], -32768
36 // CHECK-NEXT:    store i16 [[TMP1]], i16* @f, align 2
37 // CHECK-NEXT:    ret void
38 //
inc_f()39 void inc_f() {
40   f++;
41 }
42 
43 // CHECK-LABEL: @inc_lf(
44 // CHECK-NEXT:  entry:
45 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @lf, align 4
46 // CHECK-NEXT:    [[TMP1:%.*]] = sub i32 [[TMP0]], -2147483648
47 // CHECK-NEXT:    store i32 [[TMP1]], i32* @lf, align 4
48 // CHECK-NEXT:    ret void
49 //
inc_lf()50 void inc_lf() {
51   lf++;
52 }
53 
54 // SIGNED-LABEL: @inc_ua(
55 // SIGNED-NEXT:  entry:
56 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
57 // SIGNED-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], 65536
58 // SIGNED-NEXT:    store i32 [[TMP1]], i32* @ua, align 4
59 // SIGNED-NEXT:    ret void
60 //
61 // UNSIGNED-LABEL: @inc_ua(
62 // UNSIGNED-NEXT:  entry:
63 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
64 // UNSIGNED-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], 32768
65 // UNSIGNED-NEXT:    store i32 [[TMP1]], i32* @ua, align 4
66 // UNSIGNED-NEXT:    ret void
67 //
inc_ua()68 void inc_ua() {
69   ua++;
70 }
71 
72 // SIGNED-LABEL: @inc_usa(
73 // SIGNED-NEXT:  entry:
74 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
75 // SIGNED-NEXT:    [[TMP1:%.*]] = add i16 [[TMP0]], 256
76 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @usa, align 2
77 // SIGNED-NEXT:    ret void
78 //
79 // UNSIGNED-LABEL: @inc_usa(
80 // UNSIGNED-NEXT:  entry:
81 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
82 // UNSIGNED-NEXT:    [[TMP1:%.*]] = add i16 [[TMP0]], 128
83 // UNSIGNED-NEXT:    store i16 [[TMP1]], i16* @usa, align 2
84 // UNSIGNED-NEXT:    ret void
85 //
inc_usa()86 void inc_usa() {
87   usa++;
88 }
89 
90 // SIGNED-LABEL: @inc_uf(
91 // SIGNED-NEXT:  entry:
92 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
93 // SIGNED-NEXT:    [[TMP1:%.*]] = add i16 [[TMP0]], poison
94 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @uf, align 2
95 // SIGNED-NEXT:    ret void
96 //
97 // UNSIGNED-LABEL: @inc_uf(
98 // UNSIGNED-NEXT:  entry:
99 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
100 // UNSIGNED-NEXT:    [[TMP1:%.*]] = add i16 [[TMP0]], -32768
101 // UNSIGNED-NEXT:    store i16 [[TMP1]], i16* @uf, align 2
102 // UNSIGNED-NEXT:    ret void
103 //
inc_uf()104 void inc_uf() {
105   uf++;
106 }
107 
108 // CHECK-LABEL: @inc_sa(
109 // CHECK-NEXT:  entry:
110 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @sa, align 4
111 // CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -32768)
112 // CHECK-NEXT:    store i32 [[TMP1]], i32* @sa, align 4
113 // CHECK-NEXT:    ret void
114 //
inc_sa()115 void inc_sa() {
116   sa++;
117 }
118 
119 // CHECK-LABEL: @inc_sf(
120 // CHECK-NEXT:  entry:
121 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @sf, align 2
122 // CHECK-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 -32768)
123 // CHECK-NEXT:    store i16 [[TMP1]], i16* @sf, align 2
124 // CHECK-NEXT:    ret void
125 //
inc_sf()126 void inc_sf() {
127   sf++;
128 }
129 
130 // CHECK-LABEL: @inc_slf(
131 // CHECK-NEXT:  entry:
132 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @slf, align 4
133 // CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -2147483648)
134 // CHECK-NEXT:    store i32 [[TMP1]], i32* @slf, align 4
135 // CHECK-NEXT:    ret void
136 //
inc_slf()137 void inc_slf() {
138   slf++;
139 }
140 
141 // SIGNED-LABEL: @inc_sua(
142 // SIGNED-NEXT:  entry:
143 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
144 // SIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 65536)
145 // SIGNED-NEXT:    store i32 [[TMP1]], i32* @sua, align 4
146 // SIGNED-NEXT:    ret void
147 //
148 // UNSIGNED-LABEL: @inc_sua(
149 // UNSIGNED-NEXT:  entry:
150 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
151 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 32768)
152 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP1]] to i31
153 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
154 // UNSIGNED-NEXT:    store i32 [[RESIZE1]], i32* @sua, align 4
155 // UNSIGNED-NEXT:    ret void
156 //
inc_sua()157 void inc_sua() {
158   sua++;
159 }
160 
161 // SIGNED-LABEL: @inc_susa(
162 // SIGNED-NEXT:  entry:
163 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
164 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 256)
165 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @susa, align 2
166 // SIGNED-NEXT:    ret void
167 //
168 // UNSIGNED-LABEL: @inc_susa(
169 // UNSIGNED-NEXT:  entry:
170 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
171 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 128)
172 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
173 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
174 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @susa, align 2
175 // UNSIGNED-NEXT:    ret void
176 //
inc_susa()177 void inc_susa() {
178   susa++;
179 }
180 
181 // SIGNED-LABEL: @inc_suf(
182 // SIGNED-NEXT:  entry:
183 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
184 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 -1)
185 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @suf, align 2
186 // SIGNED-NEXT:    ret void
187 //
188 // UNSIGNED-LABEL: @inc_suf(
189 // UNSIGNED-NEXT:  entry:
190 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
191 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 32767)
192 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
193 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
194 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @suf, align 2
195 // UNSIGNED-NEXT:    ret void
196 //
inc_suf()197 void inc_suf() {
198   suf++;
199 }
200 
201 
202 // CHECK-LABEL: @dec_a(
203 // CHECK-NEXT:  entry:
204 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
205 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], -32768
206 // CHECK-NEXT:    store i32 [[TMP1]], i32* @a, align 4
207 // CHECK-NEXT:    ret void
208 //
dec_a()209 void dec_a() {
210   a--;
211 }
212 
213 // CHECK-LABEL: @dec_f(
214 // CHECK-NEXT:  entry:
215 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @f, align 2
216 // CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[TMP0]], -32768
217 // CHECK-NEXT:    store i16 [[TMP1]], i16* @f, align 2
218 // CHECK-NEXT:    ret void
219 //
dec_f()220 void dec_f() {
221   f--;
222 }
223 
224 // CHECK-LABEL: @dec_lf(
225 // CHECK-NEXT:  entry:
226 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @lf, align 4
227 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], -2147483648
228 // CHECK-NEXT:    store i32 [[TMP1]], i32* @lf, align 4
229 // CHECK-NEXT:    ret void
230 //
dec_lf()231 void dec_lf() {
232   lf--;
233 }
234 
235 // SIGNED-LABEL: @dec_ua(
236 // SIGNED-NEXT:  entry:
237 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
238 // SIGNED-NEXT:    [[TMP1:%.*]] = sub i32 [[TMP0]], 65536
239 // SIGNED-NEXT:    store i32 [[TMP1]], i32* @ua, align 4
240 // SIGNED-NEXT:    ret void
241 //
242 // UNSIGNED-LABEL: @dec_ua(
243 // UNSIGNED-NEXT:  entry:
244 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
245 // UNSIGNED-NEXT:    [[TMP1:%.*]] = sub i32 [[TMP0]], 32768
246 // UNSIGNED-NEXT:    store i32 [[TMP1]], i32* @ua, align 4
247 // UNSIGNED-NEXT:    ret void
248 //
dec_ua()249 void dec_ua() {
250   ua--;
251 }
252 
253 // SIGNED-LABEL: @dec_usa(
254 // SIGNED-NEXT:  entry:
255 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
256 // SIGNED-NEXT:    [[TMP1:%.*]] = sub i16 [[TMP0]], 256
257 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @usa, align 2
258 // SIGNED-NEXT:    ret void
259 //
260 // UNSIGNED-LABEL: @dec_usa(
261 // UNSIGNED-NEXT:  entry:
262 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
263 // UNSIGNED-NEXT:    [[TMP1:%.*]] = sub i16 [[TMP0]], 128
264 // UNSIGNED-NEXT:    store i16 [[TMP1]], i16* @usa, align 2
265 // UNSIGNED-NEXT:    ret void
266 //
dec_usa()267 void dec_usa() {
268   usa--;
269 }
270 
271 // SIGNED-LABEL: @dec_uf(
272 // SIGNED-NEXT:  entry:
273 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
274 // SIGNED-NEXT:    [[TMP1:%.*]] = sub i16 [[TMP0]], poison
275 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @uf, align 2
276 // SIGNED-NEXT:    ret void
277 //
278 // UNSIGNED-LABEL: @dec_uf(
279 // UNSIGNED-NEXT:  entry:
280 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
281 // UNSIGNED-NEXT:    [[TMP1:%.*]] = sub i16 [[TMP0]], -32768
282 // UNSIGNED-NEXT:    store i16 [[TMP1]], i16* @uf, align 2
283 // UNSIGNED-NEXT:    ret void
284 //
dec_uf()285 void dec_uf() {
286   uf--;
287 }
288 
289 // CHECK-LABEL: @dec_sa(
290 // CHECK-NEXT:  entry:
291 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @sa, align 4
292 // CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -32768)
293 // CHECK-NEXT:    store i32 [[TMP1]], i32* @sa, align 4
294 // CHECK-NEXT:    ret void
295 //
dec_sa()296 void dec_sa() {
297   sa--;
298 }
299 
300 // CHECK-LABEL: @dec_sf(
301 // CHECK-NEXT:  entry:
302 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @sf, align 2
303 // CHECK-NEXT:    [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 -32768)
304 // CHECK-NEXT:    store i16 [[TMP1]], i16* @sf, align 2
305 // CHECK-NEXT:    ret void
306 //
dec_sf()307 void dec_sf() {
308   sf--;
309 }
310 
311 // CHECK-LABEL: @dec_slf(
312 // CHECK-NEXT:  entry:
313 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @slf, align 4
314 // CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -2147483648)
315 // CHECK-NEXT:    store i32 [[TMP1]], i32* @slf, align 4
316 // CHECK-NEXT:    ret void
317 //
dec_slf()318 void dec_slf() {
319   slf--;
320 }
321 
322 // SIGNED-LABEL: @dec_sua(
323 // SIGNED-NEXT:  entry:
324 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
325 // SIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 65536)
326 // SIGNED-NEXT:    store i32 [[TMP1]], i32* @sua, align 4
327 // SIGNED-NEXT:    ret void
328 //
329 // UNSIGNED-LABEL: @dec_sua(
330 // UNSIGNED-NEXT:  entry:
331 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
332 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 32768)
333 // UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
334 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]
335 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i31
336 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
337 // UNSIGNED-NEXT:    store i32 [[RESIZE1]], i32* @sua, align 4
338 // UNSIGNED-NEXT:    ret void
339 //
dec_sua()340 void dec_sua() {
341   sua--;
342 }
343 
344 // SIGNED-LABEL: @dec_susa(
345 // SIGNED-NEXT:  entry:
346 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
347 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 256)
348 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @susa, align 2
349 // SIGNED-NEXT:    ret void
350 //
351 // UNSIGNED-LABEL: @dec_susa(
352 // UNSIGNED-NEXT:  entry:
353 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
354 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 128)
355 // UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
356 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
357 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
358 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
359 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @susa, align 2
360 // UNSIGNED-NEXT:    ret void
361 //
dec_susa()362 void dec_susa() {
363   susa--;
364 }
365 
366 // SIGNED-LABEL: @dec_suf(
367 // SIGNED-NEXT:  entry:
368 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
369 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 -1)
370 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @suf, align 2
371 // SIGNED-NEXT:    ret void
372 //
373 // UNSIGNED-LABEL: @dec_suf(
374 // UNSIGNED-NEXT:  entry:
375 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
376 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 32767)
377 // UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
378 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
379 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
380 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
381 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @suf, align 2
382 // UNSIGNED-NEXT:    ret void
383 //
dec_suf()384 void dec_suf() {
385   suf--;
386 }
387 
388 
389 // CHECK-LABEL: @neg_a(
390 // CHECK-NEXT:  entry:
391 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
392 // CHECK-NEXT:    [[TMP1:%.*]] = sub i32 0, [[TMP0]]
393 // CHECK-NEXT:    store i32 [[TMP1]], i32* @a, align 4
394 // CHECK-NEXT:    ret void
395 //
neg_a()396 void neg_a() {
397   a = -a;
398 }
399 
400 // CHECK-LABEL: @neg_f(
401 // CHECK-NEXT:  entry:
402 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @f, align 2
403 // CHECK-NEXT:    [[TMP1:%.*]] = sub i16 0, [[TMP0]]
404 // CHECK-NEXT:    store i16 [[TMP1]], i16* @f, align 2
405 // CHECK-NEXT:    ret void
406 //
neg_f()407 void neg_f() {
408   f = -f;
409 }
410 
411 // CHECK-LABEL: @neg_usa(
412 // CHECK-NEXT:  entry:
413 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
414 // CHECK-NEXT:    [[TMP1:%.*]] = sub i16 0, [[TMP0]]
415 // CHECK-NEXT:    store i16 [[TMP1]], i16* @usa, align 2
416 // CHECK-NEXT:    ret void
417 //
neg_usa()418 void neg_usa() {
419   usa = -usa;
420 }
421 
422 // CHECK-LABEL: @neg_uf(
423 // CHECK-NEXT:  entry:
424 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
425 // CHECK-NEXT:    [[TMP1:%.*]] = sub i16 0, [[TMP0]]
426 // CHECK-NEXT:    store i16 [[TMP1]], i16* @uf, align 2
427 // CHECK-NEXT:    ret void
428 //
neg_uf()429 void neg_uf() {
430   uf = -uf;
431 }
432 
433 // CHECK-LABEL: @neg_sa(
434 // CHECK-NEXT:  entry:
435 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @sa, align 4
436 // CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 0, i32 [[TMP0]])
437 // CHECK-NEXT:    store i32 [[TMP1]], i32* @sa, align 4
438 // CHECK-NEXT:    ret void
439 //
neg_sa()440 void neg_sa() {
441   sa = -sa;
442 }
443 
444 // CHECK-LABEL: @neg_sf(
445 // CHECK-NEXT:  entry:
446 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @sf, align 2
447 // CHECK-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
448 // CHECK-NEXT:    store i16 [[TMP1]], i16* @sf, align 2
449 // CHECK-NEXT:    ret void
450 //
neg_sf()451 void neg_sf() {
452   sf = -sf;
453 }
454 
455 // SIGNED-LABEL: @neg_susa(
456 // SIGNED-NEXT:  entry:
457 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
458 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
459 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @susa, align 2
460 // SIGNED-NEXT:    ret void
461 //
462 // UNSIGNED-LABEL: @neg_susa(
463 // UNSIGNED-NEXT:  entry:
464 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
465 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
466 // UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
467 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
468 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
469 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
470 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @susa, align 2
471 // UNSIGNED-NEXT:    ret void
472 //
neg_susa()473 void neg_susa() {
474   susa = -susa;
475 }
476 
477 // SIGNED-LABEL: @neg_suf(
478 // SIGNED-NEXT:  entry:
479 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
480 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
481 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @suf, align 2
482 // SIGNED-NEXT:    ret void
483 //
484 // UNSIGNED-LABEL: @neg_suf(
485 // UNSIGNED-NEXT:  entry:
486 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
487 // UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
488 // UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
489 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
490 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
491 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
492 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @suf, align 2
493 // UNSIGNED-NEXT:    ret void
494 //
neg_suf()495 void neg_suf() {
496   suf = -suf;
497 }
498 
499 
500 // CHECK-LABEL: @plus_a(
501 // CHECK-NEXT:  entry:
502 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
503 // CHECK-NEXT:    store i32 [[TMP0]], i32* @a, align 4
504 // CHECK-NEXT:    ret void
505 //
plus_a()506 void plus_a() {
507   a = +a;
508 }
509 
510 // CHECK-LABEL: @plus_uf(
511 // CHECK-NEXT:  entry:
512 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
513 // CHECK-NEXT:    store i16 [[TMP0]], i16* @uf, align 2
514 // CHECK-NEXT:    ret void
515 //
plus_uf()516 void plus_uf() {
517   uf = +uf;
518 }
519 
520 // CHECK-LABEL: @plus_sa(
521 // CHECK-NEXT:  entry:
522 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @sa, align 4
523 // CHECK-NEXT:    store i32 [[TMP0]], i32* @sa, align 4
524 // CHECK-NEXT:    ret void
525 //
plus_sa()526 void plus_sa() {
527   sa = +sa;
528 }
529 
530 
531 // CHECK-LABEL: @not_a(
532 // CHECK-NEXT:  entry:
533 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
534 // CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
535 // CHECK-NEXT:    [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
536 // CHECK-NEXT:    [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
537 // CHECK-NEXT:    store i32 [[LNOT_EXT]], i32* @i, align 4
538 // CHECK-NEXT:    ret void
539 //
not_a()540 void not_a() {
541   i = !a;
542 }
543 
544 // CHECK-LABEL: @not_uf(
545 // CHECK-NEXT:  entry:
546 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf, align 2
547 // CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
548 // CHECK-NEXT:    [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
549 // CHECK-NEXT:    [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
550 // CHECK-NEXT:    store i32 [[LNOT_EXT]], i32* @i, align 4
551 // CHECK-NEXT:    ret void
552 //
not_uf()553 void not_uf() {
554   i = !uf;
555 }
556 
557 // CHECK-LABEL: @not_susa(
558 // CHECK-NEXT:  entry:
559 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
560 // CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
561 // CHECK-NEXT:    [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
562 // CHECK-NEXT:    [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
563 // CHECK-NEXT:    store i32 [[LNOT_EXT]], i32* @i, align 4
564 // CHECK-NEXT:    ret void
565 //
not_susa()566 void not_susa() {
567   i = !susa;
568 }
569